zhaoms/uart_lvds_can_parse
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zhaoms a79c94f6d2 ip
2026-06-02 11:25:32 +08:00
can_parse_ctrl
422,lvds，can解析已上板验证通过
2026-05-30 12:09:51 +08:00
FPGA_USER_IP @ 6ff76329fb
ip
2026-06-02 11:25:32 +08:00
Description
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136 MiB
Languages
VHDL 86.8%
Verilog 5.6%
SystemVerilog 3.3%
Coq 2.1%
PureBasic 0.6%
Other 1.5%