#----------------------------------------------------------- # Vivado v2023.2 (64-bit) # SW Build 4029153 on Fri Oct 13 20:14:34 MDT 2023 # IP Build 4028589 on Sat Oct 14 00:45:43 MDT 2023 # SharedData Build 4025554 on Tue Oct 10 17:18:54 MDT 2023 # Start of session at: Mon Jul 6 23:17:19 2026 # Process ID: 29448 # Current directory: C:/proj/xc7v_ccsds122_datamover_uart # Command line: vivado.exe -gui_launcher_event rodinguilauncherevent36000 C:\proj\xc7v_ccsds122_datamover_uart\ccsds122_storage.xpr # Log file: C:/proj/xc7v_ccsds122_datamover_uart/vivado.log # Journal file: C:/proj/xc7v_ccsds122_datamover_uart\vivado.jou # Running On: DESKTOP-EB3SDQ2, OS: Windows, CPU Frequency: 2112 MHz, CPU Physical cores: 16, Host memory: 16817 MB #----------------------------------------------------------- start_gui open_project C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.xpr update_compile_order -fileset sources_1 open_bd_design {C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd} startgroup set_property -dict [list \ CONFIG.ADDN_UI_CLKOUT1_FREQ_HZ {100} \ CONFIG.C0.DDR4_InputClockPeriod {10000} \ ] [get_bd_cells ddr4_0] endgroup regenerate_bd_layout validate_bd_design delete_bd_objs [get_bd_intf_nets c0_sys_clk] startgroup make_bd_intf_pins_external [get_bd_intf_pins ddr4_0/C0_SYS_CLK] endgroup delete_bd_objs [get_bd_intf_ports c0_sys_clk] set_property name c0_sys_clk [get_bd_intf_nets C0_SYS_CLK_0_1] set_property name c0_sys_clk [get_bd_intf_ports C0_SYS_CLK_0] validate_bd_design regenerate_bd_layout validate_bd_design -force set_property -dict [list CONFIG.FREQ_HZ 100000000] [get_bd_intf_ports c0_sys_clk] regenerate_bd_layout validate_bd_design reset_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -sync -no_script -force -quiet delete_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] reset_run synth_1_copy_1 launch_runs impl_2 -to_step write_bitstream -jobs 24 wait_on_run impl_2 delete_bd_objs [get_bd_intf_nets smartconnect_0_M01_AXI] connect_bd_intf_net [get_bd_intf_pins ccsds_uart_axi_0/m_axil] [get_bd_intf_pins system_ila_0/SLOT_0_AXI] undo connect_bd_intf_net [get_bd_intf_pins ccsds_uart_axi_0/m_axil] [get_bd_intf_pins ccsds122_axil_slave_0/s_axil] connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_0_AXI] [get_bd_intf_pins smartconnect_0/S00_AXI] update_ip_catalog -rebuild -scan_changes report_ip_status -name ip_status upgrade_ip [get_ips {design_1_ccsds122_datamover_0_0 design_1_ccsds_uart_axi_0_0}] -log ip_upgrade.log export_ip_user_files -of_objects [get_ips {design_1_ccsds122_datamover_0_0 design_1_ccsds_uart_axi_0_0}] -no_script -sync -force -quiet report_ip_status -name ip_status startgroup set_property CONFIG.C_NUM_MONITOR_SLOTS {2} [get_bd_cells system_ila_0] endgroup connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_1_AXI] [get_bd_intf_pins smartconnect_0/S01_AXI] regenerate_bd_layout validate_bd_design report_ip_status -name ip_status generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] catch { config_ip_cache -export [get_ips -all design_1_ccsds122_datamover_0_0] } catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] } catch { [ delete_ip_run [get_ips -all design_1_smartconnect_0_1] ] } catch { config_ip_cache -export [get_ips -all design_1_ccsds_uart_axi_0_0] } catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_0] } catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_1] } export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] launch_runs design_1_ccsds122_datamover_0_0_synth_1 design_1_ccsds_uart_axi_0_0_synth_1 design_1_system_ila_0_0_synth_1 -jobs 24 wait_on_run design_1_ccsds122_datamover_0_0_synth_1 wait_on_run design_1_ccsds_uart_axi_0_0_synth_1 wait_on_run design_1_system_ila_0_0_synth_1 export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet reset_run synth_1_copy_1 launch_runs impl_2 -to_step write_bitstream -jobs 24 wait_on_run impl_2 open_run synth_1_copy_1 -name synth_1_copy_1 report_utilization -name utilization_1 close_design startgroup set_property CONFIG.C_NUM_MONITOR_SLOTS {3} [get_bd_cells system_ila_0] endgroup connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_2_AXI] [get_bd_intf_pins smartconnect_0/S02_AXI] regenerate_bd_layout validate_bd_design generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] } catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_0] } catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_1] } export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] launch_runs design_1_system_ila_0_0_synth_1 -jobs 24 wait_on_run design_1_system_ila_0_0_synth_1 export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet regenerate_bd_layout reset_run synth_1_copy_1 launch_runs impl_2 -to_step write_bitstream -jobs 24 wait_on_run impl_2 open_run synth_1_copy_1 -name synth_1_copy_1 report_utilization -name utilization_1 close_design update_ip_catalog -rebuild -scan_changes report_ip_status -name ip_status upgrade_ip -vlnv xilinx.com:user:ccsds122_datamover:1.0 [get_ips design_1_ccsds122_datamover_0_0] -log ip_upgrade.log export_ip_user_files -of_objects [get_ips design_1_ccsds122_datamover_0_0] -no_script -sync -force -quiet delete_bd_objs [get_bd_cells system_ila_1] delete_bd_objs [get_bd_cells system_ila_0] report_ip_status -name ip_status regenerate_bd_layout validate_bd_design generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] catch { config_ip_cache -export [get_ips -all design_1_ccsds122_datamover_0_0] } catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] } export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] launch_runs design_1_ccsds122_datamover_0_0_synth_1 -jobs 24 wait_on_run design_1_ccsds122_datamover_0_0_synth_1 export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet report_ip_status -name ip_status reset_run synth_1_copy_1 launch_runs impl_2 -to_step write_bitstream -jobs 24 wait_on_run impl_2 update_ip_catalog -rebuild -scan_changes report_ip_status -name ip_status upgrade_ip -vlnv xilinx.com:user:ccsds122_datamover:1.0 [get_ips design_1_ccsds122_datamover_0_0] -log ip_upgrade.log export_ip_user_files -of_objects [get_ips design_1_ccsds122_datamover_0_0] -no_script -sync -force -quiet generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] catch { config_ip_cache -export [get_ips -all design_1_ccsds122_datamover_0_0] } catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] } export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] launch_runs design_1_ccsds122_datamover_0_0_synth_1 -jobs 24 wait_on_run design_1_ccsds122_datamover_0_0_synth_1 export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet report_ip_status -name ip_status reset_run synth_1_copy_1 launch_runs impl_2 -to_step write_bitstream -jobs 24 wait_on_run impl_2 update_ip_catalog -rebuild -scan_changes report_ip_status -name ip_status upgrade_ip -vlnv xilinx.com:user:ccsds122_datamover:1.0 [get_ips design_1_ccsds122_datamover_0_0] -log ip_upgrade.log export_ip_user_files -of_objects [get_ips design_1_ccsds122_datamover_0_0] -no_script -sync -force -quiet generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] catch { config_ip_cache -export [get_ips -all design_1_ccsds122_datamover_0_0] } catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] } export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] launch_runs design_1_ccsds122_datamover_0_0_synth_1 -jobs 24 wait_on_run design_1_ccsds122_datamover_0_0_synth_1 export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet report_ip_status -name ip_status reset_run synth_1_copy_1 launch_runs impl_2 -to_step write_bitstream -jobs 24 wait_on_run impl_2 update_ip_catalog -rebuild -scan_changes report_ip_status -name ip_status upgrade_ip -vlnv xilinx.com:user:ccsds_uart_axi:1.0 [get_ips design_1_ccsds_uart_axi_0_0] -log ip_upgrade.log export_ip_user_files -of_objects [get_ips design_1_ccsds_uart_axi_0_0] -no_script -sync -force -quiet generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] } catch { config_ip_cache -export [get_ips -all design_1_ccsds_uart_axi_0_0] } export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] launch_runs design_1_ccsds_uart_axi_0_0_synth_1 -jobs 24 wait_on_run design_1_ccsds_uart_axi_0_0_synth_1 export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet report_ip_status -name ip_status reset_run synth_1_copy_1 launch_runs impl_2 -to_step write_bitstream -jobs 24 wait_on_run impl_2