#----------------------------------------------------------- # Vivado v2023.2 (64-bit) # SW Build 4029153 on Fri Oct 13 20:14:34 MDT 2023 # IP Build 4028589 on Sat Oct 14 00:45:43 MDT 2023 # SharedData Build 4025554 on Tue Oct 10 17:18:54 MDT 2023 # Start of session at: Sun Jul 5 13:55:25 2026 # Process ID: 28992 # Current directory: C:/proj/xc7v_ccsds122_datamover_uart # Command line: vivado.exe -gui_launcher_event rodinguilauncherevent22500 C:\proj\xc7v_ccsds122_datamover_uart\ccsds122_storage.xpr # Log file: C:/proj/xc7v_ccsds122_datamover_uart/vivado.log # Journal file: C:/proj/xc7v_ccsds122_datamover_uart\vivado.jou # Running On: DESKTOP-EB3SDQ2, OS: Windows, CPU Frequency: 2112 MHz, CPU Physical cores: 16, Host memory: 16817 MB #----------------------------------------------------------- start_gui open_project C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.xpr update_compile_order -fileset sources_1 set_property SOURCE_SET sources_1 [get_filesets sim_1] add_files -fileset sim_1 -norecurse {C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/interface.sv C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/arch_package.sv C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_model.sv} set_property SOURCE_SET sources_1 [get_filesets sim_1] add_files -fileset sim_1 -norecurse {C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/interface.sv C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/arch_package.sv C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_model.sv} export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_model.sv] -no_script -reset -force -quiet remove_files -fileset sim_1 C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_model.sv set_property SOURCE_SET sources_1 [get_filesets sim_1] add_files -fileset sim_1 -norecurse {C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/interface.sv C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/arch_package.sv C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_model.sv} launch_simulation set_property SOURCE_SET sources_1 [get_filesets sim_1] add_files -fileset sim_1 -norecurse {C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/arch_defines.v C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_sdram_model_wrapper.sv} launch_simulation generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet update_compile_order -fileset sim_1 export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_model.sv] -no_script -reset -force -quiet remove_files -fileset sim_1 C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_model.sv reset_simulation -simset sim_1 -mode behavioral launch_simulation source tb_design_1_wrapper.tcl restart run 7 ms run 7 ms close_sim launch_simulation source tb_design_1_wrapper.tcl restart run 7 ms run 7 ms current_wave_config {Untitled 2} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0}} current_wave_config {Untitled 2} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0/inst/u_core}} current_wave_config {Untitled 2} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds122_axil_slave_0}} current_wave_config {Untitled 2} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds122_datamover_0/inst}} current_wave_config {Untitled 2} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds122_datamover_0/inst/u_stream_ctrl}} restart run 7 ms run 7 ms current_wave_config {Untitled 2} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds122_axil_slave_0}} current_wave_config {Untitled 2} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0/inst/u_core}} current_wave_config {Untitled 2} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0/inst}} current_wave_config {Untitled 2} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0/inst}} current_wave_config {Untitled 2} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0/inst/u_core}} close_sim launch_simulation source tb_design_1_wrapper.tcl current_wave_config {Untitled 3} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i}} current_wave_config {Untitled 3} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds122_axil_slave_0}} current_wave_config {Untitled 3} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds122_datamover_0/inst/u_stream_ctrl}} current_wave_config {Untitled 3} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds122_datamover_0/inst/u_compression_top/u_bubble_removal}} current_wave_config {Untitled 3} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0}} current_wave_config {Untitled 3} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0/inst/u_core}} restart run 7 ms run 7 ms open_bd_design {C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd} close_bd_design [get_bd_designs design_1] current_wave_config {Untitled 3} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0}} current_wave_config {Untitled 3} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0/inst/u_core}} current_wave_config {Untitled 3} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0/inst/u_core}} close_sim launch_simulation source tb_design_1_wrapper.tcl current_wave_config {Untitled 4} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0/inst}} current_wave_config {Untitled 4} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0/inst/u_core}} restart run 7 ms run 7 ms current_wave_config {Untitled 4} add_wave {{/tb_design_1_wrapper/u_dut}} current_wave_config {Untitled 4} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds122_datamover_0/inst/u_stream_ctrl}} current_wave_config {Untitled 4} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds122_datamover_0/inst/u_compression_top/u_bubble_removal}} current_wave_config {Untitled 4} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0}} current_wave_config {Untitled 4} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds_uart_axi_0/inst/u_core}} current_wave_config {Untitled 4} add_wave {{/tb_design_1_wrapper/u_dut/design_1_i/ccsds122_axil_slave_0}} restart run 7 ms run 7 ms run 7 ms close_sim launch_simulation launch_simulation source tb_design_1_wrapper.tcl