173 lines
15 KiB
Plaintext
173 lines
15 KiB
Plaintext
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#-----------------------------------------------------------
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# Vivado v2023.2 (64-bit)
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# SW Build 4029153 on Fri Oct 13 20:14:34 MDT 2023
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# IP Build 4028589 on Sat Oct 14 00:45:43 MDT 2023
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# SharedData Build 4025554 on Tue Oct 10 17:18:54 MDT 2023
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# Start of session at: Mon Jul 6 23:17:19 2026
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# Process ID: 29448
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# Current directory: C:/proj/xc7v_ccsds122_datamover_uart
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# Command line: vivado.exe -gui_launcher_event rodinguilauncherevent36000 C:\proj\xc7v_ccsds122_datamover_uart\ccsds122_storage.xpr
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# Log file: C:/proj/xc7v_ccsds122_datamover_uart/vivado.log
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# Journal file: C:/proj/xc7v_ccsds122_datamover_uart\vivado.jou
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# Running On: DESKTOP-EB3SDQ2, OS: Windows, CPU Frequency: 2112 MHz, CPU Physical cores: 16, Host memory: 16817 MB
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#-----------------------------------------------------------
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start_gui
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open_project C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.xpr
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update_compile_order -fileset sources_1
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open_bd_design {C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd}
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startgroup
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set_property -dict [list \
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CONFIG.ADDN_UI_CLKOUT1_FREQ_HZ {100} \
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CONFIG.C0.DDR4_InputClockPeriod {10000} \
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] [get_bd_cells ddr4_0]
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endgroup
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regenerate_bd_layout
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validate_bd_design
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delete_bd_objs [get_bd_intf_nets c0_sys_clk]
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startgroup
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make_bd_intf_pins_external [get_bd_intf_pins ddr4_0/C0_SYS_CLK]
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endgroup
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delete_bd_objs [get_bd_intf_ports c0_sys_clk]
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set_property name c0_sys_clk [get_bd_intf_nets C0_SYS_CLK_0_1]
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set_property name c0_sys_clk [get_bd_intf_ports C0_SYS_CLK_0]
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validate_bd_design
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regenerate_bd_layout
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validate_bd_design -force
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set_property -dict [list CONFIG.FREQ_HZ 100000000] [get_bd_intf_ports c0_sys_clk]
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regenerate_bd_layout
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validate_bd_design
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reset_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -sync -no_script -force -quiet
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delete_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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reset_run synth_1_copy_1
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launch_runs impl_2 -to_step write_bitstream -jobs 24
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wait_on_run impl_2
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delete_bd_objs [get_bd_intf_nets smartconnect_0_M01_AXI]
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connect_bd_intf_net [get_bd_intf_pins ccsds_uart_axi_0/m_axil] [get_bd_intf_pins system_ila_0/SLOT_0_AXI]
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undo
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connect_bd_intf_net [get_bd_intf_pins ccsds_uart_axi_0/m_axil] [get_bd_intf_pins ccsds122_axil_slave_0/s_axil]
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connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_0_AXI] [get_bd_intf_pins smartconnect_0/S00_AXI]
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update_ip_catalog -rebuild -scan_changes
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report_ip_status -name ip_status
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upgrade_ip [get_ips {design_1_ccsds122_datamover_0_0 design_1_ccsds_uart_axi_0_0}] -log ip_upgrade.log
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export_ip_user_files -of_objects [get_ips {design_1_ccsds122_datamover_0_0 design_1_ccsds_uart_axi_0_0}] -no_script -sync -force -quiet
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report_ip_status -name ip_status
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startgroup
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set_property CONFIG.C_NUM_MONITOR_SLOTS {2} [get_bd_cells system_ila_0]
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endgroup
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connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_1_AXI] [get_bd_intf_pins smartconnect_0/S01_AXI]
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regenerate_bd_layout
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validate_bd_design
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report_ip_status -name ip_status
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generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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catch { config_ip_cache -export [get_ips -all design_1_ccsds122_datamover_0_0] }
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catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] }
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catch { [ delete_ip_run [get_ips -all design_1_smartconnect_0_1] ] }
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catch { config_ip_cache -export [get_ips -all design_1_ccsds_uart_axi_0_0] }
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catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_0] }
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catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_1] }
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export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet
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create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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launch_runs design_1_ccsds122_datamover_0_0_synth_1 design_1_ccsds_uart_axi_0_0_synth_1 design_1_system_ila_0_0_synth_1 -jobs 24
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wait_on_run design_1_ccsds122_datamover_0_0_synth_1
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wait_on_run design_1_ccsds_uart_axi_0_0_synth_1
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wait_on_run design_1_system_ila_0_0_synth_1
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export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet
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reset_run synth_1_copy_1
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launch_runs impl_2 -to_step write_bitstream -jobs 24
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wait_on_run impl_2
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open_run synth_1_copy_1 -name synth_1_copy_1
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report_utilization -name utilization_1
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close_design
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startgroup
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set_property CONFIG.C_NUM_MONITOR_SLOTS {3} [get_bd_cells system_ila_0]
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endgroup
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connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_2_AXI] [get_bd_intf_pins smartconnect_0/S02_AXI]
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regenerate_bd_layout
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validate_bd_design
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generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] }
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catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_0] }
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catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_1] }
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export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet
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create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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launch_runs design_1_system_ila_0_0_synth_1 -jobs 24
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wait_on_run design_1_system_ila_0_0_synth_1
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export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet
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regenerate_bd_layout
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reset_run synth_1_copy_1
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launch_runs impl_2 -to_step write_bitstream -jobs 24
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wait_on_run impl_2
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open_run synth_1_copy_1 -name synth_1_copy_1
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report_utilization -name utilization_1
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close_design
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update_ip_catalog -rebuild -scan_changes
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report_ip_status -name ip_status
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upgrade_ip -vlnv xilinx.com:user:ccsds122_datamover:1.0 [get_ips design_1_ccsds122_datamover_0_0] -log ip_upgrade.log
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export_ip_user_files -of_objects [get_ips design_1_ccsds122_datamover_0_0] -no_script -sync -force -quiet
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delete_bd_objs [get_bd_cells system_ila_1]
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delete_bd_objs [get_bd_cells system_ila_0]
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report_ip_status -name ip_status
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regenerate_bd_layout
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validate_bd_design
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generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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catch { config_ip_cache -export [get_ips -all design_1_ccsds122_datamover_0_0] }
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catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] }
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export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet
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create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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launch_runs design_1_ccsds122_datamover_0_0_synth_1 -jobs 24
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wait_on_run design_1_ccsds122_datamover_0_0_synth_1
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export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet
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report_ip_status -name ip_status
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reset_run synth_1_copy_1
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launch_runs impl_2 -to_step write_bitstream -jobs 24
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wait_on_run impl_2
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update_ip_catalog -rebuild -scan_changes
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report_ip_status -name ip_status
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upgrade_ip -vlnv xilinx.com:user:ccsds122_datamover:1.0 [get_ips design_1_ccsds122_datamover_0_0] -log ip_upgrade.log
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export_ip_user_files -of_objects [get_ips design_1_ccsds122_datamover_0_0] -no_script -sync -force -quiet
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generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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catch { config_ip_cache -export [get_ips -all design_1_ccsds122_datamover_0_0] }
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catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] }
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export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet
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create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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launch_runs design_1_ccsds122_datamover_0_0_synth_1 -jobs 24
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wait_on_run design_1_ccsds122_datamover_0_0_synth_1
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export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet
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report_ip_status -name ip_status
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reset_run synth_1_copy_1
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launch_runs impl_2 -to_step write_bitstream -jobs 24
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wait_on_run impl_2
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update_ip_catalog -rebuild -scan_changes
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report_ip_status -name ip_status
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upgrade_ip -vlnv xilinx.com:user:ccsds122_datamover:1.0 [get_ips design_1_ccsds122_datamover_0_0] -log ip_upgrade.log
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export_ip_user_files -of_objects [get_ips design_1_ccsds122_datamover_0_0] -no_script -sync -force -quiet
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generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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catch { config_ip_cache -export [get_ips -all design_1_ccsds122_datamover_0_0] }
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catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] }
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export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet
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create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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launch_runs design_1_ccsds122_datamover_0_0_synth_1 -jobs 24
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wait_on_run design_1_ccsds122_datamover_0_0_synth_1
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export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet
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report_ip_status -name ip_status
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reset_run synth_1_copy_1
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launch_runs impl_2 -to_step write_bitstream -jobs 24
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wait_on_run impl_2
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update_ip_catalog -rebuild -scan_changes
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report_ip_status -name ip_status
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upgrade_ip -vlnv xilinx.com:user:ccsds_uart_axi:1.0 [get_ips design_1_ccsds_uart_axi_0_0] -log ip_upgrade.log
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export_ip_user_files -of_objects [get_ips design_1_ccsds_uart_axi_0_0] -no_script -sync -force -quiet
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generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] }
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catch { config_ip_cache -export [get_ips -all design_1_ccsds_uart_axi_0_0] }
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export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet
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create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
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launch_runs design_1_ccsds_uart_axi_0_0_synth_1 -jobs 24
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wait_on_run design_1_ccsds_uart_axi_0_0_synth_1
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export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet
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report_ip_status -name ip_status
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reset_run synth_1_copy_1
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launch_runs impl_2 -to_step write_bitstream -jobs 24
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wait_on_run impl_2
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