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ku5p_ccsds122_datamover_uart/vivado_24964.backup.jou

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#-----------------------------------------------------------
# Vivado v2023.2 (64-bit)
# SW Build 4029153 on Fri Oct 13 20:14:34 MDT 2023
# IP Build 4028589 on Sat Oct 14 00:45:43 MDT 2023
# SharedData Build 4025554 on Tue Oct 10 17:18:54 MDT 2023
# Start of session at: Mon Jul 6 15:22:16 2026
# Process ID: 24964
# Current directory: C:/proj/xc7v_ccsds122_datamover_uart
# Command line: vivado.exe -gui_launcher_event rodinguilauncherevent34776 C:\proj\xc7v_ccsds122_datamover_uart\ccsds122_storage.xpr
# Log file: C:/proj/xc7v_ccsds122_datamover_uart/vivado.log
# Journal file: C:/proj/xc7v_ccsds122_datamover_uart\vivado.jou
# Running On: DESKTOP-EB3SDQ2, OS: Windows, CPU Frequency: 2112 MHz, CPU Physical cores: 16, Host memory: 16817 MB
#-----------------------------------------------------------
start_gui
open_project C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.xpr
update_compile_order -fileset sources_1
update_compile_order -fileset sim_1
export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_sim_ex/imports/MemoryArray.sv] -no_script -reset -force -quiet
export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/arch_package.sv] -no_script -reset -force -quiet
export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_sim_ex/imports/interface.sv] -no_script -reset -force -quiet
export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/interface.sv] -no_script -reset -force -quiet
export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_sim_ex/imports/proj_package.sv] -no_script -reset -force -quiet
export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/tb_design_1_wrapper.sv] -no_script -reset -force -quiet
remove_files -fileset sim_1 {C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_sim_ex/imports/MemoryArray.sv C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/arch_package.sv C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_sim_ex/imports/interface.sv C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/interface.sv C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/ddr4_sim_ex/imports/proj_package.sv C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sim_1/imports/tb_design_1_wrapper.sv}
open_bd_design {C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd}
regenerate_bd_layout
reset_run synth_1_copy_1
launch_runs impl_2 -to_step write_bitstream -jobs 24
wait_on_run impl_2
reset_run design_1_axi_image_gen_0_0_synth_1
delete_bd_objs [get_bd_intf_nets axi_image_gen_0_m_axi] [get_bd_nets ccsds122_axil_slave_0_img_src_sel] [get_bd_nets ccsds122_axil_slave_0_img_gen_start] [get_bd_nets ccsds122_axil_slave_0_img_rows] [get_bd_nets ccsds122_axil_slave_0_storage_mode] [get_bd_nets axi_image_gen_0_done_o] [get_bd_nets axi_image_gen_0_busy_o] [get_bd_cells axi_image_gen_0]
regenerate_bd_layout
validate_bd_design
regenerate_bd_layout
generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] }
catch { config_ip_cache -export [get_ips -all design_1_ddr4_0_0] }
catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_0] }
catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_1] }
export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet
create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
launch_runs design_1_ddr4_0_0_synth_1 design_1_smartconnect_0_1_synth_1 design_1_system_ila_0_0_synth_1 -jobs 24
wait_on_run design_1_ddr4_0_0_synth_1
wait_on_run design_1_smartconnect_0_1_synth_1
wait_on_run design_1_system_ila_0_0_synth_1
export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet
reset_run synth_1_copy_1
launch_runs impl_2 -to_step write_bitstream -jobs 24
wait_on_run impl_2
delete_bd_objs [get_bd_nets ccsds122_datamover_0_mm2s_err] [get_bd_nets ccsds122_datamover_0_img_b1_row] [get_bd_nets ccsds122_datamover_0_compress_b2_base_addr] [get_bd_nets ccsds122_datamover_0_compress_done_valid] [get_bd_nets ccsds122_datamover_0_compress_b4_base_addr] [get_bd_nets ccsds122_datamover_0_s2mm_err] [get_bd_nets ccsds122_datamover_0_img_pan_row] [get_bd_nets ccsds122_datamover_0_img_b2_row] [get_bd_nets ccsds122_datamover_0_compress_pan_base_addr] [get_bd_nets ccsds122_datamover_0_compress_b3_base_addr] [get_bd_nets ccsds122_datamover_0_img_b4_row] [get_bd_nets ccsds122_datamover_0_img_b3_row] [get_bd_nets ccsds122_datamover_0_compress_b1_base_addr] [get_bd_cells ila_0]
startgroup
set_property CONFIG.C_NUM_MONITOR_SLOTS {5} [get_bd_cells system_ila_0]
endgroup
startgroup
set_property CONFIG.NUM_SI {4} [get_bd_cells smartconnect_0]
endgroup
connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_3_AXI] [get_bd_intf_pins smartconnect_0/S02_AXI]
connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_4_AXI] [get_bd_intf_pins smartconnect_0/S03_AXI]
regenerate_bd_layout
validate_bd_design
delete_bd_objs [get_bd_nets addn_ui_clkout1]
connect_bd_net [get_bd_pins proc_sys_reset_0/slowest_sync_clk] [get_bd_pins ddr4_0/c0_ddr4_ui_clk]
connect_bd_net [get_bd_pins ddr4_0/addn_ui_clkout1] [get_bd_pins system_ila_0/clk]
connect_bd_net [get_bd_pins ddr4_0/addn_ui_clkout1] [get_bd_pins smartconnect_0/aclk]
connect_bd_net [get_bd_pins ddr4_0/addn_ui_clkout1] [get_bd_pins ccsds122_axil_slave_0/clk]
connect_bd_net [get_bd_pins ddr4_0/addn_ui_clkout1] [get_bd_pins ccsds122_datamover_0/clk]
connect_bd_net [get_bd_pins ddr4_0/addn_ui_clkout1] [get_bd_pins ccsds122_datamover_0/m_axi_mm2s_aclk]
connect_bd_net [get_bd_pins ddr4_0/addn_ui_clkout1] [get_bd_pins ccsds122_datamover_0/m_axis_mm2s_cmdsts_aclk]
connect_bd_net [get_bd_pins ddr4_0/addn_ui_clkout1] [get_bd_pins ccsds122_datamover_0/m_axi_s2mm_aclk]
connect_bd_net [get_bd_pins ddr4_0/addn_ui_clkout1] [get_bd_pins ccsds122_datamover_0/m_axis_s2mm_cmdsts_awclk]
connect_bd_net [get_bd_pins ddr4_0/addn_ui_clkout1] [get_bd_pins ccsds_uart_axi_0/clk]
regenerate_bd_layout
validate_bd_design
delete_bd_objs [get_bd_nets ddr4_ui_clk]
connect_bd_net [get_bd_pins ddr4_0/c0_ddr4_ui_clk] [get_bd_pins smartconnect_0/aclk1]
connect_bd_net [get_bd_pins ddr4_0/c0_ddr4_ui_clk] [get_bd_pins system_ila_1/clk]
copy_bd_objs / [get_bd_cells {proc_sys_reset_0}]
connect_bd_net [get_bd_pins ddr4_0/addn_ui_clkout1] [get_bd_pins proc_sys_reset_0/slowest_sync_clk]
delete_bd_objs [get_bd_nets s_aresetn_0_1]
undo
delete_bd_objs [get_bd_nets s_aresetn_0_1]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds_uart_axi_0/rst_n]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds122_datamover_0/rst_n]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds122_datamover_0/m_axi_mm2s_aresetn]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds122_datamover_0/m_axis_mm2s_cmdsts_aresetn]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds122_datamover_0/m_axi_s2mm_aresetn]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds122_datamover_0/m_axis_s2mm_cmdsts_aresetn]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds122_axil_slave_0/rst_n]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins smartconnect_0/aresetn]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins system_ila_0/resetn]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ddr4_0/c0_ddr4_aresetn]
connect_bd_net [get_bd_pins ddr4_0/c0_ddr4_ui_clk] [get_bd_pins proc_sys_reset_1/slowest_sync_clk]
connect_bd_net [get_bd_pins ddr4_0/c0_ddr4_ui_clk_sync_rst] [get_bd_pins proc_sys_reset_1/ext_reset_in]
connect_bd_net [get_bd_pins proc_sys_reset_1/peripheral_aresetn] [get_bd_pins system_ila_1/resetn]
regenerate_bd_layout
validate_bd_design
delete_bd_objs [get_bd_nets proc_sys_reset_0_peripheral_aresetn]
connect_bd_net [get_bd_pins ddr4_0/c0_ddr4_aresetn] [get_bd_pins proc_sys_reset_1/peripheral_aresetn]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds_uart_axi_0/rst_n]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds122_datamover_0/rst_n]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds122_datamover_0/m_axi_mm2s_aresetn]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds122_datamover_0/m_axis_mm2s_cmdsts_aresetn]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds122_datamover_0/m_axi_s2mm_aresetn]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds122_datamover_0/m_axis_s2mm_cmdsts_aresetn]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins ccsds122_axil_slave_0/rst_n]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins smartconnect_0/aresetn]
connect_bd_net [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins system_ila_0/resetn]
regenerate_bd_layout
validate_bd_design
generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] }
catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_0] }
catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_1] }
catch { config_ip_cache -export [get_ips -all design_1_proc_sys_reset_0_1] }
export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet
create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
launch_runs design_1_smartconnect_0_1_synth_1 design_1_system_ila_0_0_synth_1 -jobs 24
wait_on_run design_1_smartconnect_0_1_synth_1
wait_on_run design_1_system_ila_0_0_synth_1
export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet
reset_run synth_1_copy_1
launch_runs impl_2 -to_step write_bitstream -jobs 24
wait_on_run impl_2
open_run synth_1_copy_1 -name synth_1_copy_1
delete_bd_objs [get_bd_intf_nets ccsds_uart_axi_0_m_axi]
delete_bd_objs [get_bd_intf_nets ccsds_uart_axi_0_m_axil]
connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_3_AXI] [get_bd_intf_pins smartconnect_0/S02_AXI]
connect_bd_intf_net [get_bd_intf_pins smartconnect_0/S02_AXI] [get_bd_intf_pins ccsds_uart_axi_0/m_axil]
connect_bd_intf_net [get_bd_intf_pins ccsds_uart_axi_0/m_axi] [get_bd_intf_pins smartconnect_0/S03_AXI]
startgroup
set_property CONFIG.C_NUM_MONITOR_SLOTS {4} [get_bd_cells system_ila_0]
endgroup
update_ip_catalog -rebuild -scan_changes
report_ip_status -name ip_status
upgrade_ip [get_ips {design_1_ccsds122_datamover_0_0 design_1_ccsds_uart_axi_0_0}] -log ip_upgrade.log
export_ip_user_files -of_objects [get_ips {design_1_ccsds122_datamover_0_0 design_1_ccsds_uart_axi_0_0}] -no_script -sync -force -quiet
generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
catch { config_ip_cache -export [get_ips -all design_1_ccsds122_datamover_0_0] }
catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] }
catch { config_ip_cache -export [get_ips -all design_1_ccsds_uart_axi_0_0] }
catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_0] }
catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_1] }
export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet
create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
launch_runs design_1_ccsds122_datamover_0_0_synth_1 design_1_ccsds_uart_axi_0_0_synth_1 design_1_smartconnect_0_1_synth_1 design_1_system_ila_0_0_synth_1 -jobs 24
wait_on_run design_1_ccsds122_datamover_0_0_synth_1
wait_on_run design_1_ccsds_uart_axi_0_0_synth_1
wait_on_run design_1_smartconnect_0_1_synth_1
wait_on_run design_1_system_ila_0_0_synth_1
export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet
report_ip_status -name ip_status
reset_run synth_1_copy_1
launch_runs impl_2 -to_step write_bitstream -jobs 24
wait_on_run impl_2
open_run synth_1_copy_1 -name synth_1_copy_1
report_utilization -name utilization_1
close_design
startgroup
set_property CONFIG.C_NUM_MONITOR_SLOTS {3} [get_bd_cells system_ila_0]
endgroup
delete_bd_objs [get_bd_intf_nets ccsds122_datamover_0_m_axi_s2mm]
set_property location {2 624 311} [get_bd_cells ccsds122_datamover_0]
connect_bd_intf_net [get_bd_intf_pins ccsds122_datamover_0/m_axi_s2mm] [get_bd_intf_pins smartconnect_0/S01_AXI]
connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_1_AXI] [get_bd_intf_pins ccsds_uart_axi_0/m_axil]
delete_bd_objs [get_bd_intf_nets ccsds122_datamover_0_m_axi_mm2s]
set_property location {2 681 222} [get_bd_cells ccsds122_datamover_0]
connect_bd_intf_net [get_bd_intf_pins ccsds122_datamover_0/m_axi_mm2s] [get_bd_intf_pins smartconnect_0/S00_AXI]
connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_0_AXI] [get_bd_intf_pins smartconnect_0/S03_AXI]
regenerate_bd_layout
validate_bd_design
startgroup
set_property CONFIG.C_NUM_MONITOR_SLOTS {2} [get_bd_cells system_ila_0]
endgroup
delete_bd_objs [get_bd_intf_nets ccsds_uart_axi_0_m_axi]
connect_bd_intf_net [get_bd_intf_pins ccsds_uart_axi_0/m_axi] [get_bd_intf_pins smartconnect_0/S03_AXI]
connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_0_AXI] [get_bd_intf_pins smartconnect_0/M01_AXI]
regenerate_bd_layout
validate_bd_design
startgroup
set_property -dict [list \
CONFIG.NUM_MI {1} \
CONFIG.NUM_SI {3} \
] [get_bd_cells smartconnect_0]
delete_bd_objs [get_bd_intf_nets ccsds_uart_axi_0_m_axi]
endgroup
delete_bd_objs [get_bd_intf_nets Conn]
connect_bd_intf_net [get_bd_intf_pins ccsds_uart_axi_0/m_axi] [get_bd_intf_pins smartconnect_0/S02_AXI]
connect_bd_intf_net [get_bd_intf_pins ccsds_uart_axi_0/m_axil] [get_bd_intf_pins ccsds122_axil_slave_0/s_axil]
connect_bd_intf_net [get_bd_intf_pins system_ila_0/SLOT_1_AXI] [get_bd_intf_pins smartconnect_0/S02_AXI]
regenerate_bd_layout
validate_bd_design
delete_bd_objs [get_bd_addr_segs ccsds122_datamover_0/m_axi_mm2s/SEG_ccsds122_axil_slave_0_reg0]
delete_bd_objs [get_bd_addr_segs ccsds122_datamover_0/m_axi_s2mm/SEG_ccsds122_axil_slave_0_reg0]
delete_bd_objs [get_bd_addr_segs ccsds_uart_axi_0/m_axi/SEG_ccsds122_axil_slave_0_reg0]
delete_bd_objs [get_bd_addr_segs ccsds_uart_axi_0/m_axil/SEG_ccsds122_axil_slave_0_reg0]
delete_bd_objs [get_bd_addr_segs ccsds_uart_axi_0/m_axil/SEG_ddr4_0_C0_DDR4_ADDRESS_BLOCK]
assign_bd_address -target_address_space /ccsds_uart_axi_0/m_axil [get_bd_addr_segs ccsds122_axil_slave_0/s_axil/reg0] -force
set_property range 64K [get_bd_addr_segs {ccsds_uart_axi_0/m_axil/SEG_ccsds122_axil_slave_0_reg0}]
set_property offset 0x80000000 [get_bd_addr_segs {ccsds_uart_axi_0/m_axil/SEG_ccsds122_axil_slave_0_reg0}]
update_ip_catalog -rebuild -scan_changes
report_ip_status -name ip_status
upgrade_ip [get_ips {design_1_ccsds122_axil_slave_0_0 design_1_ccsds_uart_axi_0_0}] -log ip_upgrade.log
export_ip_user_files -of_objects [get_ips {design_1_ccsds122_axil_slave_0_0 design_1_ccsds_uart_axi_0_0}] -no_script -sync -force -quiet
generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] }
catch { config_ip_cache -export [get_ips -all design_1_ccsds122_axil_slave_0_0] }
catch { config_ip_cache -export [get_ips -all design_1_ccsds_uart_axi_0_0] }
catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_0] }
catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_1] }
export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet
create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
launch_runs design_1_ccsds122_axil_slave_0_0_synth_1 design_1_ccsds_uart_axi_0_0_synth_1 design_1_smartconnect_0_1_synth_1 design_1_system_ila_0_0_synth_1 -jobs 24
wait_on_run design_1_ccsds122_axil_slave_0_0_synth_1
wait_on_run design_1_ccsds_uart_axi_0_0_synth_1
wait_on_run design_1_smartconnect_0_1_synth_1
wait_on_run design_1_system_ila_0_0_synth_1
export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet
report_ip_status -name ip_status
set_property location {3 1249 716} [get_bd_cells smartconnect_0]
reset_run synth_1_copy_1
launch_runs impl_2 -to_step write_bitstream -jobs 24
wait_on_run impl_2
regenerate_bd_layout
startgroup
set_property CONFIG.C_NUM_MONITOR_SLOTS {1} [get_bd_cells system_ila_0]
endgroup
validate_bd_design
regenerate_bd_layout
generate_target all [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
catch { config_ip_cache -export [get_ips -all design_1_smartconnect_0_1] }
catch { [ delete_ip_run [get_ips -all design_1_smartconnect_0_1] ] }
catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_0] }
catch { config_ip_cache -export [get_ips -all design_1_system_ila_0_1] }
export_ip_user_files -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -no_script -sync -force -quiet
create_ip_run [get_files -of_objects [get_fileset sources_1] C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd]
launch_runs design_1_system_ila_0_0_synth_1 -jobs 24
wait_on_run design_1_system_ila_0_0_synth_1
export_simulation -of_objects [get_files C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.srcs/sources_1/bd/design_1/design_1.bd] -directory C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/sim_scripts -ip_user_files_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files -ipstatic_source_dir C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.ip_user_files/ipstatic -lib_map_path [list {modelsim=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/modelsim} {questa=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/questa} {riviera=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/riviera} {activehdl=C:/proj/xc7v_ccsds122_datamover_uart/ccsds122_storage.cache/compile_simlib/activehdl}] -use_ip_compiled_libs -force -quiet
reset_run synth_1_copy_1
launch_runs impl_2 -to_step write_bitstream -jobs 24
wait_on_run impl_2
startgroup
set_property CONFIG.ADDN_UI_CLKOUT1_FREQ_HZ {None} [get_bd_cells ddr4_0]
endgroup
startgroup
create_bd_cell -type ip -vlnv xilinx.com:ip:clk_wiz:6.0 clk_wiz_0
endgroup