24 lines
574 B
Plaintext
24 lines
574 B
Plaintext
// instram0, dataram0 and dataram1 are defined in 'core-isa.h'.
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instram0: Memory.MappedMemory @ sysbus 0x40000000
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size: 0x20000
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dataram0: Memory.MappedMemory @ sysbus 0x3FFE0000
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size: 0x20000
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dataram1: Memory.MappedMemory @ sysbus 0x3FFC0000
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size: 0x20000
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// The reset vector points to 0x50000000.
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rom: Memory.MappedMemory @ sysbus 0x50000000
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size: 0x4000000
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ram: Memory.MappedMemory @ sysbus 0x60000000
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size: 0x8000000
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cpu: CPU.Xtensa @ sysbus
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cpuType: "sample_controller"
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frequency: 100000000
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uartSemihosting: UART.SemihostingUart @ cpu
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