413 lines
17 KiB
Plaintext
413 lines
17 KiB
Plaintext
*** Settings ***
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Test Setup Create Machine
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Library ${CURDIR}/AndesATCWDT200_Watchdog-helpers.py
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*** Variables ***
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${PLATFORM_PATH} @platforms/cpus/egis_et171.repl
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${CORE_0_PC} 0x80000000
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# Register offsets
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${IdAndRevision} 0x00
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${Reserved} 0x04
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${Control} 0x10
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${Restart} 0x14
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${WriteEnable} 0x18
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${Status} 0x1C
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# Control register flags
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${SystemResetEnableBit} 3
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${InterruptEnableBit} 2
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${EnableBit} 0
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# Status register flags
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${InterruptExpired} 0
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# Magic numbers
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${ATCWDT200_WP_NUM} 0x5AA5 # for Write Protection
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${ATCWDT200_RESTART_NUM} 0xCAFE # for restarting the watchdog timer
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*** Keywords ***
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Create Machine
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Execute Command mach create
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Execute Command machine LoadPlatformDescription ${PLATFORM_PATH}
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# Have the core stuck in an infinite loop.
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Execute Command cpu0 PC ${CORE_0_PC}
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Execute Command cpu0 AssembleBlock ${CORE_0_PC} "j 0"
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Create Log Tester timeout=0 defaultPauseEmulation=True
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Execute Command logLevel 0 watchdog
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Read Watchdog Byte At ${offset}
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${value}= Execute Command watchdog ReadByteUsingDoubleWord ${offset}
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[return] ${value.strip()}
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Write Watchdog Word ${value} To ${offset}
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Execute Command watchdog WriteWordUsingDoubleWord ${offset} ${value}
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Write To ${offset} Is ${result:(Ignored|Allowed)}
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[Arguments] ${value}=0xAD
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${initial_value}= Read Watchdog Byte At ${offset}
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Execute Command watchdog WriteByteUsingDoubleWord ${offset} ${value}
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${value}= Read Watchdog Byte At ${offset}
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IF '${result}' == 'Ignored'
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Should Be Equal As Integers
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... ${value}
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... ${initial_value}
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... Register should remain unchanged, but it changed from ${initial_value} to ${value}
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ELSE
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Should Not Be Equal As Integers
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... ${value}
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... ${initial_value}
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... Register should change, but it did not: ${value}
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END
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Set Watchdog Flag At Bit ${bit} In ${offset} To ${value:(0|1)}
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${current_value}= Execute Command watchdog ReadDoubleWord ${offset}
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${mask}= Set Variable ${{ 1 << ${bit} }}
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IF '${value}' == '0'
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${negated_mask}= Set Variable ${{ ~${mask} }}
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${new_value}= Set Variable ${{ ${current_value.strip()} & ${negated_mask} }}
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ELSE
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${new_value}= Set Variable ${{ ${current_value.strip()} | ${mask} }}
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END
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Execute Command watchdog WriteDoubleWord ${offset} ${new_value}
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Read Watchdog Flag At Bit ${bit} In ${offset}
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${current_value}= Execute Command watchdog ReadDoubleWord ${offset}
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${mask}= Set Variable ${{ 1 << ${bit} }}
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${flag_value}= Set Variable ${{ ${current_value.strip()} & ${mask} }}
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[return] ${flag_value}
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Enable Watchdog Timer
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Write Watchdog Word ${ATCWDT200_WP_NUM} To ${WriteEnable}
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Set Watchdog Flag At Bit ${EnableBit} In ${Control} To 1
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Enable Watchdog Interrupt
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Write Watchdog Word ${ATCWDT200_WP_NUM} To ${WriteEnable}
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Set Watchdog Flag At Bit ${InterruptEnableBit} In ${Control} To 1
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Disable Watchdog Interrupt
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Write Watchdog Word ${ATCWDT200_WP_NUM} To ${WriteEnable}
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Set Watchdog Flag At Bit ${InterruptEnableBit} In ${Control} To 0
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Enable Watchdog System Reset
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Write Watchdog Word ${ATCWDT200_WP_NUM} To ${WriteEnable}
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Set Watchdog Flag At Bit ${SystemResetEnableBit} In ${Control} To 1
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Restart Watchdog
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[Arguments] ${restart_value}=${ATCWDT200_RESTART_NUM}
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Write Watchdog Word ${ATCWDT200_WP_NUM} To ${WriteEnable}
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Write Watchdog Word ${restart_value} To ${Restart}
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Watchdog IRQ Should Be ${expected_state:(High|Low)}
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[Arguments] ${message}=
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${is_signal_set}= Execute Command watchdog IRQ IsSet
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${actual_state}= Set Variable If '${is_signal_set.strip()}' == 'True'
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... High
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... Low
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Should Be Equal
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... ${actual_state}
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... ${expected_state}
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... ${message} IRQ should be ${expected_state}, but it was ${actual_state}
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Get Interrupt Timeout
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${control}= Execute Command watchdog ReadDoubleWord ${Control}
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${frequency}= Execute Command syscon APBClockFrequency
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${seconds}= Get Interrupt Timeout Seconds ${control} ${frequency}
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Log To Console interrupt timeout is ${seconds}s
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[return] ${seconds}
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Wait For Interrupt Timeout
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${seconds}= Get Interrupt Timeout
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Execute Command emulation RunFor "${seconds}s"
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Wait For Reset Timeout
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${control}= Execute Command watchdog ReadDoubleWord ${Control}
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${frequency}= Execute Command syscon APBClockFrequency
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${seconds}= Get Reset Timeout Seconds ${control} ${frequency}
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Log To Console reset timeout is ${seconds}s
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Execute Command emulation RunFor "${seconds}s"
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Watchdog IRQ Should Initially Be ${initial_value:(High|Low)} And After Timeout Be ${final_value:(High|Low)}
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Watchdog IRQ Should Be ${initial_value} Initially,
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Wait For Interrupt Timeout
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Watchdog IRQ Should Be ${final_value} After timeout,
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Watchdog System Reset Should ${triggered:(Be|Not Be)} Triggered
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IF '${triggered}' == 'Be'
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Wait For Log Entry Reset timer elapsed
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ELSE
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Should Not Be In Log Reset timer elapsed
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END
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Watchdog System Reset Should Initially ${initial_value:(Be|Not Be)} Triggered And After Timeout ${final_value:(Be|Not Be)} Triggered
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Watchdog System Reset Should ${initial_value} Triggered
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Wait For Reset Timeout
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Watchdog System Reset Should ${final_value} Triggered
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Write ${value} To Restart Register Periodically
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# Watchdog interrupt is disabled by default, so we have to enable it.
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Enable Watchdog Interrupt
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# Watchdog timer is disabled by default, so enable it.
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Enable Watchdog Timer
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# Watchdog interrupt should not be high initially.
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Watchdog IRQ Should Be Low
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${interrupt_timeout_seconds}= Get Interrupt Timeout
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# A duration that's small enough to not elapse the timer,
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# but big enough that several steps of this size _will_ elapse the timer.
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${small_step}= Evaluate ${interrupt_timeout_seconds}/3
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# Round it to avoid infinite decimals.
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${small_step_rounded}= Round To N Significant Digits ${small_step} 3
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# Restart the watchdog periodically, so as to not trigger the interrupt.
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Execute Command emulation RunFor "${small_step_rounded}s"
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Restart Watchdog ${value}
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Execute Command emulation RunFor "${small_step_rounded}s"
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Restart Watchdog ${value}
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Execute Command emulation RunFor "${small_step_rounded}s"
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Interrupt Status Register Flag Matches IRQ Signal
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${interrupt_flag_value}= Read Watchdog Flag At Bit ${InterruptExpired} In ${Status}
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${interrupt_flag}= Set Variable If '${interrupt_flag_value}' == '0'
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... Low
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... High
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${is_signal_set}= Execute Command watchdog IRQ IsSet
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${interrupt_signal}= Set Variable If '${is_signal_set.strip()}' == 'False'
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... Low
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... High
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Should Be Equal ${interrupt_flag} ${interrupt_signal} Expected interrupt flag (${interrupt_flag}) and signal (${interrupt_signal}) to match
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*** Test Cases ***
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Write To Read-Only ID And Revision Register Is Ignored
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Write To ${IdAndRevision} Is Ignored
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Write To Write-Protected Control Register Is Ignored
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Write To ${Control} Is Ignored
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Write To Write-Protected Restart Register Is Ignored
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Write To ${Restart} Is Ignored
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Write To Write-Protected Control Register Is Allowed After Write-Enable
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Write Watchdog Word ${ATCWDT200_WP_NUM} To ${WriteEnable}
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Write To ${Control} Is Allowed
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Consecutive Writes To Write-Protected Control Register Is Ignored After Write-Enable
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Write Watchdog Word ${ATCWDT200_WP_NUM} To ${WriteEnable}
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Write To ${Control} Is Allowed
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Write To ${Control} Is Ignored value=0xDE
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Write To ${Control} Is Ignored value=0xFA
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Interrupt Timer Fires After Default Interval
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# Watchdog interrupt is disabled by default, so we have to enable it.
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Enable Watchdog Interrupt
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# Watchdog timer is disabled by default, so enable it.
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Enable Watchdog Timer
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Watchdog IRQ Should Initially Be Low And After Timeout Be High
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Interrupt Timer Only Fires Once
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# Watchdog interrupt is disabled by default, so we have to enable it.
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Enable Watchdog Interrupt
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# Watchdog timer is disabled by default, so enable it.
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Enable Watchdog Timer
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# Timer should fire once.
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Wait For Interrupt Timeout
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Wait For Log Entry Interrupt timer elapsed
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# Timer should not fire again.
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Wait For Interrupt Timeout
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Should Not Be In Log Interrupt timer elapsed
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Interrupt Signal Does Not Fire When Interrupt Disabled
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# Watchdog interrupt is disabled by default, so we don't have to disable it.
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# Watchdog timer is disabled by default, so enable it.
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Enable Watchdog Timer
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Watchdog IRQ Should Initially Be Low And After Timeout Be Low
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Interrupt Timer Does Not Fire When Watchdog Disabled
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# Watchdog interrupt is disabled by default, so we have to enable it.
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Enable Watchdog Interrupt
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# Watchdog timer is disabled by default, so we don't have to disable it.
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Watchdog IRQ Should Initially Be Low And After Timeout Be Low
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Reset Timer Does Not Fire When Watchdog Disabled
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Enable Watchdog Interrupt
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Enable Watchdog System Reset
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# Watchdog timer is disabled by default, so we don't have to disable it.
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Watchdog IRQ Should Initially Be Low And After Timeout Be Low
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Watchdog System Reset Should Initially Not Be Triggered And After Timeout Not Be Triggered
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Reset Timer Fires When Interrupt Signal Disabled
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# Watchdog interrupt is disabled by default, so we don't have to disable it.
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Enable Watchdog System Reset
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Enable Watchdog Timer
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Watchdog IRQ Should Initially Be Low And After Timeout Be Low
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Watchdog System Reset Should Initially Not Be Triggered And After Timeout Be Triggered
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Reset Timer Does Not Fire When Reset Signal Disabled
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# Watchdog reset signal is disabled by default, so we don't have to disable it.
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Enable Watchdog Timer
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Watchdog IRQ Should Initially Be Low And After Timeout Be Low
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Watchdog System Reset Should Initially Not Be Triggered And After Timeout Not Be Triggered
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Write To Restart Register Restarts Interrupt Timer
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Write ${ATCWDT200_RESTART_NUM} To Restart Register Periodically
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# Watchdog interrupt should not have been triggered, due to the restarting.
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Watchdog IRQ Should Be Low
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Writing Invalid Value To Restart Register Does Not Restart Interrupt Timer
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Write 0xdead To Restart Register Periodically
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# Watchdog interrupt should still have been triggered, as the restarting was invalidly done.
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Watchdog IRQ Should Be High
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Write To Restart Register Cancels System Reset Timer
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# Watchdog interrupt is disabled by default, so we have to enable it.
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Enable Watchdog Interrupt
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# Watchdog timer is disabled by default, so enable it.
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Enable Watchdog Timer
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# Let the interrupt timer elapse, in order to start the reset timer.
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# But don't wait long enough that the reset timer elapses.
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Wait For Interrupt Timeout
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# Interrupt should have now been triggered, starting the reset timer.
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Watchdog IRQ Should Be High
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# Disable the interrupt timer. We don't want it to elapse again,
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# we're just interested in the reset timer.
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Disable Watchdog Interrupt
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# Reset timer should not have elapsed yet.
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Watchdog System Reset Should Not Be Triggered
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# Now, send restart signal in order to cancel the reset timer.
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Restart Watchdog
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# Let enough time pass for the reset timer to elapse, if it wasn't cancelled as it should have been.
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Wait For Reset Timeout
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# Watchdog system reset should not have been triggered, due to the restarting cancelling the timer.
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Watchdog System Reset Should Not Be Triggered
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Reset Signal Activates After Interrupt Activates
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Enable Watchdog Interrupt
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Enable Watchdog System Reset
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Enable Watchdog Timer
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# Let the interrupt timer elapse first.
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Watchdog IRQ Should Initially Be Low And After Timeout Be High
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# Then, let the system reset timer elapse.
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Watchdog System Reset Should Initially Not Be Triggered And After Timeout Be Triggered
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Reset Does Not Trigger When Disabled
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Enable Watchdog Interrupt
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Enable Watchdog Timer
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# Let the interrupt timer elapse.
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Watchdog IRQ Should Initially Be Low And After Timeout Be High
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# Reset timer shouldn't elapse.
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Watchdog System Reset Should Initially Not Be Triggered And After Timeout Not Be Triggered
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Interrupt Status Register Flag Should Always Match Interrupt Signal
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Enable Watchdog Interrupt
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Enable Watchdog Timer
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# Initially, both should be low.
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Interrupt Status Register Flag Matches IRQ Signal
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# Let interrupt timer elapse...
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Wait For Interrupt Timeout
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# After the timeout, they should both be high.
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Interrupt Status Register Flag Matches IRQ Signal
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Writing 1 To Interrupt Status Register Flag Should Clear It
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Enable Watchdog Interrupt
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Enable Watchdog Timer
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# Flag should initially be unset.
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${interrupt_flag}= Read Watchdog Flag At Bit ${InterruptExpired} In ${Status}
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Should Be Equal As Integers ${interrupt_flag} 0 Interrupt flag should be unset initially
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# Let interrupt timer elapse...
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Wait For Interrupt Timeout
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# Flag should now be set.
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${interrupt_flag}= Read Watchdog Flag At Bit ${InterruptExpired} In ${Status}
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Should Be Equal As Integers ${interrupt_flag} 1 Interrupt flag should be unset initially
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# Write 1 to the flag to clear it.
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Set Watchdog Flag At Bit ${InterruptExpired} In ${Status} To 1
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# Flag should now be unset.
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${interrupt_flag}= Read Watchdog Flag At Bit ${InterruptExpired} In ${Status}
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Should Be Equal As Integers ${interrupt_flag} 0 Interrupt flag should have been unset by the write
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Writing 0 To Interrupt Status Register Flag Should Do Nothing
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Enable Watchdog Interrupt
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Enable Watchdog Timer
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# Flag should initially be unset.
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${interrupt_flag}= Read Watchdog Flag At Bit ${InterruptExpired} In ${Status}
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Should Be Equal As Integers ${interrupt_flag} 0 Interrupt flag should be unset initially
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# Let interrupt timer elapse...
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Wait For Interrupt Timeout
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# Flag should now be set.
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${interrupt_flag}= Read Watchdog Flag At Bit ${InterruptExpired} In ${Status}
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Should Be Equal As Integers ${interrupt_flag} 1 Interrupt flag should be unset initially
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# Write 0 to the flag.
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Set Watchdog Flag At Bit ${InterruptExpired} In ${Status} To 0
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# Flag should still be set.
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${interrupt_flag}= Read Watchdog Flag At Bit ${InterruptExpired} In ${Status}
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Should Be Equal As Integers ${interrupt_flag} 1 Interrupt flag should remain unchanged after the write
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Interrupt Timer Fires Again After Status Is Cleared
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# Watchdog interrupt is disabled by default, so we have to enable it.
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Enable Watchdog Interrupt
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# Watchdog timer is disabled by default, so enable it.
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Enable Watchdog Timer
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# Timer should fire once.
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Wait For Interrupt Timeout
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Wait For Log Entry Interrupt timer elapsed
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# Clear the status.
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Set Watchdog Flag At Bit ${InterruptExpired} In ${Status} To 1
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# Timer should fire again.
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Wait For Interrupt Timeout
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Wait For Log Entry Interrupt timer elapsed
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