156 lines
7.4 KiB
Plaintext
156 lines
7.4 KiB
Plaintext
*** Keywords ***
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Create Machine
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Execute Command mach create
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Execute Command machine LoadPlatformDescriptionFromString "cpu: CPU.RiscV64 @ sysbus { cpuType: \\"rv64imacbv_zicsr\\"; timeProvider: empty }"
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Execute Command machine LoadPlatformDescriptionFromString "mem: Memory.MappedMemory @ sysbus 0x0 { size: 0x1000 }"
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Execute Command sysbus.cpu PC 0x0
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*** Test Cases ***
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Should Count Custom 16-bit Instruction
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Create Machine
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Execute Command sysbus.cpu InstallCustomInstructionHandlerFromString "1011001110001110" "cpu.DebugLog('custom instruction executed!')"
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Execute Command sysbus.cpu EnableCustomOpcodesCounting
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Execute Command sysbus WriteWord 0x0 0xb38e
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Execute Command sysbus.cpu Step
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PC Should Be Equal 0x2
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${c}= Execute Command sysbus.cpu GetOpcodeCounter "1011001110001110"
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Should Be Equal As Numbers ${c} 1
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Should Count Custom 32-bit Instruction
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Create Machine
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Execute Command sysbus.cpu InstallCustomInstructionHandlerFromString "10110011100011110000111110000011" "cpu.DebugLog('custom instruction executed!')"
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Execute Command sysbus.cpu EnableCustomOpcodesCounting
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Execute Command sysbus WriteDoubleWord 0x0 0xb38f0f83
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Execute Command sysbus.cpu Step
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PC Should Be Equal 0x4
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${c}= Execute Command sysbus.cpu GetOpcodeCounter "10110011100011110000111110000011"
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Should Be Equal As Numbers ${c} 1
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Should Count Custom 64-bit Instruction
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Create Machine
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Execute Command sysbus.cpu InstallCustomInstructionHandlerFromString "1011001110001111000011111000001010110011100011110000111110111111" "cpu.DebugLog('custom instruction executed!')"
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Execute Command sysbus.cpu EnableCustomOpcodesCounting
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Execute Command sysbus WriteDoubleWord 0x0 0xb38f0fbf
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Execute Command sysbus WriteDoubleWord 0x4 0xb38f0f82
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Execute Command sysbus.cpu Step
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PC Should Be Equal 0x8
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${c}= Execute Command sysbus.cpu GetOpcodeCounter "1011001110001111000011111000001010110011100011110000111110111111"
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Should Be Equal As Numbers ${c} 1
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Should Count Standard Opcode
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Create Machine
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Execute Command sysbus.cpu InstallOpcodeCounterPattern "nop" "0000000000010011"
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Execute Command sysbus.cpu EnableOpcodesCounting true
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Execute Command sysbus WriteDoubleWord 0x0 0x13
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Execute Command sysbus WriteDoubleWord 0x4 0x13
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Execute Command sysbus WriteDoubleWord 0x8 0x13
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Execute Command sysbus.cpu Step 3
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PC Should Be Equal 0xC
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${c}= Execute Command sysbus.cpu GetOpcodeCounter "nop"
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Should Be Equal As Numbers ${c} 3
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Create Machine
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Create Log Tester 1
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Should Count RVV Opcode
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Create Machine
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Execute Command sysbus.cpu EnableVectorOpcodesCounting
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# vlm.v
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Execute Command sysbus WriteDoubleWord 0x0 0x02b00007
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Execute Command sysbus.cpu Step
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PC Should Be Equal 0x4
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${c}= Execute Command sysbus.cpu GetOpcodeCounter "vlm.v"
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Should Be Equal As Numbers ${c} 1
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Should Parse All Embedded RISC-V Opcodes
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Create Machine
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${names}= Execute Command sysbus.cpu GetRiscvOpcodesEmbeddedResourceNames
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${names}= Remove String ${names} [ ] \n ${SPACE}
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# remove the dangling `,` produced by the Monitor
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${names}= Evaluate '${names}'.rstrip(',')
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@{names}= Split String ${names} ,
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FOR ${name} IN @{names}
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Execute Command sysbus.cpu EnableRiscvOpcodesCountingFromEmbeddedResource "${name}"
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END
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${r}= Execute Command sysbus.cpu GetAllOpcodesCounters
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Should Contain ${r} \@custom0
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Should Contain ${r} wfi
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Should Count RISC-V Opcodes
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Create Machine
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# this should enable all opcodes supported by the simulated core
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Execute Command sysbus.cpu EnableRiscvOpcodesCounting
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# auipc
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Execute Command sysbus WriteDoubleWord 0x0 0x00000297
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# addi
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Execute Command sysbus WriteDoubleWord 0x4 0x01028293
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# csrw
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Execute Command sysbus WriteDoubleWord 0x8 0x30529073
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# j
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Execute Command sysbus WriteDoubleWord 0xC 0x0000006f
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Execute Command sysbus.cpu Step 4
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${c}= Execute Command sysbus.cpu GetOpcodeCounter "jal"
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Should Be Equal As Numbers ${c} 1
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${c}= Execute Command sysbus.cpu GetOpcodeCounter "auipc"
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Should Be Equal As Numbers ${c} 1
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${c}= Execute Command sysbus.cpu GetOpcodeCounter "addi"
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Should Be Equal As Numbers ${c} 1
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${c}= Execute Command sysbus.cpu GetOpcodeCounter "csrrw"
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Should Be Equal As Numbers ${c} 1
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Should Count RISC-V Opcodes By B Extension
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Create Machine
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# this should only enable opcodes supported by the B extension
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Execute Command sysbus.cpu EnableRiscvOpcodesCountingByExtension B
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# sh2add (from Zba extension)
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Execute Command sysbus WriteDoubleWord 0x0 0x20004033
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# andn (from Zbb extension)
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Execute Command sysbus WriteDoubleWord 0x4 0x40007033
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# bclr (from Zbs extension)
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Execute Command sysbus WriteDoubleWord 0x8 0x48001033
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# addi (not part of the B extension)
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Execute Command sysbus WriteDoubleWord 0xC 0x01028293
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Execute Command sysbus.cpu Step 4
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${c}= Execute Command sysbus.cpu GetOpcodeCounter "sh2add"
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Should Be Equal As Numbers ${c} 1
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${c}= Execute Command sysbus.cpu GetOpcodeCounter "andn"
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Should Be Equal As Numbers ${c} 1
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${c}= Execute Command sysbus.cpu GetOpcodeCounter "bclr"
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Should Be Equal As Numbers ${c} 1
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Run Keyword And Expect Error
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... *KeywordException: Could not execute command 'sysbus.cpu GetOpcodeCounter "addi"'*
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... Execute Command sysbus.cpu GetOpcodeCounter "addi"
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