147 lines
7.2 KiB
Plaintext
147 lines
7.2 KiB
Plaintext
*** Variables ***
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${ZEPHYR_GENERIC_BIN} @https://dl.antmicro.com/projects/renode/frdm_k64f--zephyr-fpu_sharing_generic.elf-s_861928-bef2795db6dd11f8106387ff6c6afd35686c48de
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${STACKING_PLATFORM_TEST_V7M} @https://dl.antmicro.com/projects/renode/cortex-v7m-extended-frame-test.elf-s_91928-d49ec01cc0c6270f7055330871953182a507efc6
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${STACKING_PLATFORM_TEST_V8M} @https://dl.antmicro.com/projects/renode/cortex-v8m_tz-extended-frame-test.elf-s_92692-88fe4c7b72824b0d3700927033873924025c2b7d
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${NOCP_UART} 0x100000
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${NOCP_SCB_CSFR} 0xE000ED2A
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${NOCP_SCB_SHCSR} 0xE000ED24
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${NOCP_ASSEMBLY} SEPARATOR=\n
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... """
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... Vector_Table:
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... .word 0x1000 // SP
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... .word Reset_Handler+1
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... .word 0
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... .word 0
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... .word 0
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... .word 0
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... .word UsageFault_Handler+1
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... .align 12
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...
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... Reset_Handler:
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... ldr r1, =${NOCP_SCB_SHCSR}
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... ldr r2, [r1]
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... orr r2, r2, 0x40000 // (1u << 18) SCB_SHCSR_USGFAULTENA
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... str r2, [r1]
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... mov r3, ${NOCP_UART}
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...
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... mov r7, 0x200
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... mov r2, Vector_Table
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... vldr s15, [r2]
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... vcvt.s32.f32 s15, s15
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... vcvt.f32.s32 s15, s15
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... vstr s15, [r7]
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...
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... ldr r4, =String_OK
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... b Print_String
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...
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... Print_String:
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... 1: ldrb r0, [r4]
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... add r4, r4, #1
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... cmp r0, #0
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... beq 2f
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... strb r0, [r3]
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... b 1b
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... 2: wfi
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...
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... UsageFault_Handler:
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... ldr r1, =${NOCP_SCB_CSFR}
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... ldr r2, [r1]
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... mov r1, 0b1000 // NOCP bit
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... ldr r4, =String_NOCP
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... cmp r1, r2
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... beq Print_String
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... wfi
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...
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... String_NOCP:
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... .asciz "NOCP\n"
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... String_OK:
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... .asciz "OK\n"
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... """
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${STACKING_PLATFORM_COMMON} SEPARATOR=\n """
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... mem: Memory.MappedMemory @ sysbus 0x0
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... ${SPACE*4}size: 0x40000
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... uart: UART.NS16550 @ sysbus 0x80000
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... """
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${STACKING_PLATFORM_V7M} SEPARATOR=\n """
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... cpu: CPU.CortexM @ sysbus
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... ${SPACE*4}cpuType: "cortex-m4"
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... ${SPACE*4}nvic: nvic
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... nvic: IRQControllers.NVIC @ sysbus 0xe000e000
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... ${SPACE*4}-> cpu@0
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... """
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${STACKING_PLATFORM_V8M} SEPARATOR=\n """
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... cpu: CPU.CortexM @ sysbus
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... ${SPACE*4}cpuType: "cortex-m33"
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... ${SPACE*4}enableTrustZone: true
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... ${SPACE*4}nvic: nvic
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... nvic: IRQControllers.NVIC @ sysbus 0xe000e000
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... ${SPACE*4}-> cpu@0
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... """
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${TRIVIAL_PLATFORM_V8M} SEPARATOR=\n """
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... mem: Memory.MappedMemory @ sysbus 0x0
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... ${SPACE*4}size: 0x40000
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... cpu: CPU.CortexM @ sysbus
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... ${SPACE*4}cpuType: "cortex-m33"
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... ${SPACE*4}nvic: nvic
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... nvic: IRQControllers.NVIC @ sysbus 0xe000e000
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... ${SPACE*4}-> cpu@0
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... uart: UART.TrivialUart @ sysbus 0x100000
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... """
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*** Keywords ***
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Prepare Trivial Platform
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Execute Command mach create
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Execute Command machine LoadPlatformDescriptionFromString ${TRIVIAL_PLATFORM_V8M}
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Create Terminal Tester sysbus.uart defaultPauseEmulation=True
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Execute Command cpu AssembleBlock 0x10000 ${NOCP_ASSEMBLY}
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Execute Command cpu VectorTableOffset 0x10000
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*** Test Cases ***
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Should Pass Zephyr FPU Sharing Generic Tests
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Execute Command mach create
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Execute Command machine LoadPlatformDescription @platforms/cpus/nxp-k6xf.repl
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Create Terminal Tester sysbus.uart0
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Execute Command sysbus LoadELF ${ZEPHYR_GENERIC_BIN}
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Start Emulation
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${result}= Wait For Line On Uart PROJECT EXECUTION (SUCCESSFUL|FAILED) timeout=32 treatAsRegex=true
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Should Contain ${result.Line} SUCCESSFUL
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Should Pass Context Stacking Preservation Test v7-M
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Execute Command mach create
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Execute Command machine LoadPlatformDescriptionFromString ${STACKING_PLATFORM_COMMON}
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Execute Command machine LoadPlatformDescriptionFromString ${STACKING_PLATFORM_V7M}
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Create Terminal Tester sysbus.uart defaultPauseEmulation=True
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Execute Command sysbus LoadELF ${STACKING_PLATFORM_TEST_V7M}
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Execute Command cpu VectorTableOffset `sysbus GetSymbolAddress "vector_table"`
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Wait For Line On Uart Test succeeded
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Should Pass Context Stacking Preservation Test v8-M with TrustZone
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Execute Command mach create
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Execute Command machine LoadPlatformDescriptionFromString ${STACKING_PLATFORM_COMMON}
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Execute Command machine LoadPlatformDescriptionFromString ${STACKING_PLATFORM_V8M}
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Create Terminal Tester sysbus.uart defaultPauseEmulation=True
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Execute Command sysbus LoadELF ${STACKING_PLATFORM_TEST_V8M}
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Execute Command cpu VectorTableOffset `sysbus GetSymbolAddress "vector_table"`
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Wait For Line On Uart Test succeeded
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Should Not Raise Exception
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Prepare Trivial Platform
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Execute Command cpu FpuEnabled true
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Wait For Line On Uart OK
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Should Raise NOCP Exception
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Prepare Trivial Platform
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Wait For Line On Uart NOCP
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