90 lines
3.0 KiB
Plaintext
90 lines
3.0 KiB
Plaintext
*** Variables ***
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${MTVEC} 0x80080000
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${RV32_PRIV10}= SEPARATOR=${\n}
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... """
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... cpu: CPU.RiscV32 @ sysbus
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... ${SPACE*4}cpuType: "rv32gcv"
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... ${SPACE*4}privilegedArchitecture: PrivilegedArchitecture.Priv1_10
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... ${SPACE*4}timeProvider: empty
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...
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... dram: Memory.MappedMemory @ sysbus 0x80000000
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... ${SPACE*4}size: 0x06400000
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... """
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*** Keywords ***
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Write Opcode To
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[Arguments] ${adress} ${opcode}
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Execute Command sysbus WriteDoubleWord ${adress} ${opcode}
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Create RV32PRIV10 Machine
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Execute Command using sysbus
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Execute Command mach create
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Execute Command machine LoadPlatformDescriptionFromString ${RV32_PRIV10}
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Prepare RV32 State
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Execute Command cpu MTVEC ${MTVEC}
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Execute Command cpu PC 0x80000000
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Step Once And Ensure Not Trapped
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[Arguments] ${trap_adress}
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${PC}= Execute Command cpu Step
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Should Not Be Equal As Integers ${PC} ${trap_adress}
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*** Test Cases ***
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Should Not Throw Exception After MRET in the NAPOT GRAIN32 Configuration
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Create RV32PRIV10 Machine
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Prepare RV32 State
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####################################
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# PMP Configuration: #
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# Rules : 1 (pmpaddr0 + pmpcfg0) #
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# Mode : NAPOT #
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# Grain : 32 #
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# #
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# Expected configuration: #
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# - sa = 0x0 #
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# - ea = 0xFFFFFFFF #
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# - privs = R/W/X #
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# - lock = false #
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####################################
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# Aligment
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Write Opcode To 0x80000000 0x13 # nop
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# Set up pmpaddr0
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Write Opcode To 0x80000004 0x800002b7 # lui t0,0x80000
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Write Opcode To 0x80000008 0x12fd # addi t0,t0,-1 # t0 = 0x7fffffff
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Write Opcode To 0x8000000A 0x3b029073 # csrw pmpaddr0,t0
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# Set up pmpcfg0
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Write Opcode To 0x8000000E 0x42fd # li t0,31
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Write Opcode To 0x80000010 0x3a029073 # csrw pmpcfg0,t0
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Execute Command cpu MEPC 0x80000018
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Write Opcode To 0x80000014 0x30200073 # mret
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Execute Command cpu Step 7
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################################
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# PMP TEST START #
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################################
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# Test code execution from the PMP covered region
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Write Opcode To 0x80000018 0x13 # nop
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Step Once And Ensure Not Trapped ${MTVEC}
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# Test loads from the PMP covered region
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Execute Command cpu SetRegister 8 0x80001000
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Write Opcode To 0x8000001c 0x00042483 # lw s1, 0(s0)
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Step Once And Ensure Not Trapped ${MTVEC}
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# Test writes to PMP covered region
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Write Opcode To 0x80000020 0x00942023 # sw s1,0(s0)
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Step Once And Ensure Not Trapped ${MTVEC}
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