179 lines
6.5 KiB
Plaintext
179 lines
6.5 KiB
Plaintext
*** Variables ***
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${ADDRESS_REG} 0
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${VALUE_REG} 1
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${STATUS_REG} 2
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*** Keywords ***
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Write Opcode
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[Arguments] ${address} ${opcode}
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Execute Command sysbus WriteDoubleWord ${address} ${opcode}
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Compare Store Status
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[Arguments] ${expected} ${cpu}=0
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${value}= Execute Command cpu${cpu} GetRegister ${STATUS_REG}
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Should Be Equal As Integers ${value} ${expected} Unexpected store status on cpu${cpu}
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Compare Memory Content
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[Arguments] ${expected} ${cpu}=0
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${addr}= Execute Command cpu${cpu} GetRegister ${ADDRESS_REG}
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${value}= Execute Command sysbus ReadDoubleWord ${addr}
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Should Be Equal As Integers ${value} ${expected} Unexpected memory value on cpu${cpu}
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Step
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[Arguments] ${steps}=1 ${cpu}=0
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Execute Command cpu${cpu} Step ${steps}
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Set Value
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[Arguments] ${value} ${cpu}=0
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Execute Command cpu${cpu} SetRegister ${VALUE_REG} ${value}
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Set Address
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[Arguments] ${value} ${cpu}=0
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Execute Command cpu${cpu} SetRegister ${ADDRESS_REG} ${value}
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Create Machine
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[Arguments] ${cpu_count}=1
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Execute Command using sysbus
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Execute Command mach create
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FOR ${i} IN RANGE ${cpu_count}
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Execute Command machine LoadPlatformDescriptionFromString "cpu${i}: CPU.ARMv7R @ sysbus { cpuType: \\"cortex-r8\\"; cpuId: ${i} }"
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Execute Command cpu${i} ExecutionMode SingleStep
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Execute Command cpu${i} SetRegister ${ADDRESS_REG} 0x1000
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Execute Command cpu${i} PC 0x0
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Execute Command cpu${i} SetRegister ${STATUS_REG} 0x100
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END
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Execute Command machine LoadPlatformDescriptionFromString "mem: Memory.MappedMemory @ sysbus 0x0 { size: 0x8000000 }"
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*** Test Cases ***
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Should Store Exclusive Correctly
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Create Machine
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Write Opcode 0x0 0xE1901F9F # ldrex r1, [r0]
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Write Opcode 0x4 0xE3A0100A # mov r1, #0xA
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Write Opcode 0x8 0xE1802F91 # strex r2, r1, [r0]
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Step steps=3
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Compare Store Status 0
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Compare Memory Content 0xA
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Should Not Store Before Load Exclusive
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Create Machine
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Write Opcode 0x0 0xE3A0100A # mov r1, #0xA
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Write Opcode 0x4 0xE1802F91 # strex r2, r1, [r0]
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Step steps=2
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Compare Store Status 1
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Compare Memory Content 0x0
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Should Not Store If Value Changed
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Create Machine
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Write Opcode 0x0 0xE1901F9F # ldrex r1, [r0]
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Write Opcode 0x4 0xE3A0100A # mov r1, #0xA
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Write Opcode 0x8 0xE5801000 # str r1, [r0]
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Write Opcode 0xC 0xE3A0100B # mov r1, #0xB
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Write Opcode 0x10 0xE1802F91 # strex r2, r1, [r0]
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Step steps=5
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Compare Store Status 1
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# Storing 0xA with normal store and 0xB with the exclusive store. Check if the value was not overriden
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Compare Memory Content 0xA
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Both CPUs Should Store
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Create Machine cpu_count=2
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Write Opcode 0x0 0xE1901F9F # ldrex r1, [r0]
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Write Opcode 0x4 0xE1802F91 # strex r2, r1, [r0]
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Set Address 0xAA cpu=0
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Set Address 0xBB cpu=1
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Step cpu=0
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Step cpu=1
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Set Value 0xA cpu=0
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Set Value 0xB cpu=1
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Step cpu=0
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Step cpu=1
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Compare Store Status 0 cpu=0
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Compare Memory Content 0xA cpu=0
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Compare Store Status 0 cpu=1
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Compare Memory Content 0xB cpu=1
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Second CPU Should Not Store
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Create Machine cpu_count=2
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Write Opcode 0x0 0xE1901F9F # ldrex r1, [r0]
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Write Opcode 0x4 0xE1802F91 # strex r2, r1, [r0]
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Step cpu=0
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Step cpu=1
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Set Value 0xA cpu=0
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Set Value 0xB cpu=1
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Step cpu=0
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Step cpu=1
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Compare Store Status 0 cpu=0
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Compare Memory Content 0xA cpu=0
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Compare Store Status 1 cpu=1
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Compare Memory Content 0xA cpu=1
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First CPU Should Not Store
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Create Machine cpu_count=2
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Write Opcode 0x0 0xE1901F9F # ldrex r1, [r0]
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Write Opcode 0x4 0xE1802F91 # strex r2, r1, [r0]
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Step cpu=0
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Step cpu=1
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Set Value 0xA cpu=0
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Set Value 0xB cpu=1
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Step cpu=1
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Step cpu=0
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Compare Store Status 1 cpu=0
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Compare Memory Content 0xB cpu=0
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Compare Store Status 0 cpu=1
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Compare Memory Content 0xB cpu=1
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Should Serialize Atomic State
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Create Machine cpu_count=2
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Write Opcode 0x0 0xE1901F9F # ldrex r1, [r0]
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Write Opcode 0x4 0xE1802F91 # strex r2, r1, [r0]
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Set Address 0xAA cpu=0
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Set Address 0xBB cpu=1
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Step cpu=0
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Step cpu=1
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Provides registration-pass
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Should Use Serialized Atomic State And Store Succesfully
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Requires registration-pass
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Execute Command cpu0 ExecutionMode SingleStep
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Execute Command cpu1 ExecutionMode SingleStep
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Set Value 0xA cpu=0
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Set Value 0xB cpu=1
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Step cpu=0
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Step cpu=1
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Compare Store Status 0 cpu=0
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Compare Memory Content 0xA cpu=0
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Compare Store Status 0 cpu=1
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Compare Memory Content 0xB cpu=1
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