35 lines
829 B
Plaintext
35 lines
829 B
Plaintext
rom: Memory.MappedMemory @ {
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sysbus 0x80000000;
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sysbus 0x0
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}
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size: 0x2000000
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cpu1: CPU.RiscV64 @ sysbus
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cpuType: "rv64imacfd_zicsr_zifencei"
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privilegedArchitecture: PrivilegedArchitecture.Priv1_10
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timeProvider: clint
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hartId: 0
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cpu2: CPU.RiscV64 @ sysbus
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cpuType: "rv64imafdc_zicsr_zifencei"
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privilegedArchitecture: PrivilegedArchitecture.Priv1_10
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timeProvider: clint
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hartId: 1
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uart: UART.SiFive_UART @ sysbus 0x38000000
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-> plic@33
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clint: IRQControllers.CoreLevelInterruptor @ sysbus 0x02000000
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[0,1] -> cpu1@[3,7]
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[2,3] -> cpu2@[3,7]
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frequency: 62000000
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numberOfTargets: 2
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plic: IRQControllers.PlatformLevelInterruptController @ sysbus 0x0C000000
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[0,1] -> cpu1@[11,9]
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[2,3] -> cpu2@[11,9]
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numberOfSources: 65
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numberOfContexts: 4
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