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仿真平台内核初版 -tlib库 包含<sparc arm riscv powerPC>

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liuwb
2026-02-07 20:43:43 +08:00
parent de61f9e2b0
commit b3117648be
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tests/peripherals/CLIC/CLIC-preemption-01.robot Normal file
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*** Variables ***
${UART} sysbus.uart
${PLATFORM} @tests/peripherals/CLIC/CLIC-test-platform.repl
${BIN} @https://dl.antmicro.com/projects/renode/clic/clic_preemption-01.elf-s_10168-4a165b59b2d840747b93f7b8c2e61a2d0ef7da0f
*** Keywords ***
Create Machine
Execute Command using sysbus
Execute Command mach create
Execute Command machine LoadPlatformDescription ${PLATFORM}
Execute Command sysbus LoadELF ${BIN}
*** Test Cases ***
Should Pass CLIC-preemption-01
Create Machine
Create Terminal Tester ${UART}
Wait For Line On Uart Init complete
Execute Command clic OnGPIO 16 True
Wait For Line On Uart Interrupt 16, level 2
Execute Command clic OnGPIO 17 True
Should Not Be On Uart Interrupt 17, level 1
Execute Command clic OnGPIO 18 True
Wait For Line On Uart Interrupt 18, level 3