仿真平台内核初版 -tlib库 包含<sparc arm riscv powerPC>

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liuwb
2026-02-07 20:43:43 +08:00
parent de61f9e2b0
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//
// Copyright (c) 2010-2024 Antmicro
//
// This file is licensed under the MIT License.
// Full license text is available in 'licenses/MIT.txt'.
//
using Antmicro.Renode.Core;
using Antmicro.Renode.Peripherals.Bus;
namespace Antmicro.Renode.Peripherals.CPU
{
public class SampleStateAwareReader : IBusPeripheral
{
public SampleStateAwareReader(Machine machine)
{
sysbus = machine.GetSystemBus(this);
}
public void Reset()
{
}
public uint Read(ulong address, ulong state)
{
return sysbus.ReadDoubleWord(address, context: this, cpuState: state);
}
private IBusController sysbus;
}
}