仿真平台内核初版 -tlib库包含<sparc arm riscv powerPC>

2026-02-07 20:43:43 +08:00
parent de61f9e2b0
commit b3117648be
9748 changed files with 4309137 additions and 0 deletions
--- a/platforms/cpus/msp430f2619.repl
+++ b/platforms/cpus/msp430f2619.repl
@@ -0,0 +1,71 @@
+cpu: CPU.MSP430X @ sysbus
+    cpuType: "msp430x"
+
+ram: Memory.ArrayMemory @ {
+    sysbus 0x00200;
+    sysbus 0x01100
+}
+    size: 0x800
+
+wdt: Timers.MSP430F2XXX_Watchdog @ {
+    sysbus 0x120;
+    sysbus new Bus.BusMultiRegistration { address: 0x0000; size: 0x1; region: "interruptEnable" };
+    sysbus new Bus.BusMultiRegistration { address: 0x0002; size: 0x1; region: "interruptStatus" }
+}
+    baseFrequency: 32768
+
+dma: Memory.MSP430F261X_DMA @ {
+    sysbus <0x122, +0x8>;
+    sysbus new Bus.BusMultiRegistration { address: 0x1D0; size: 0x24; region: "channelRegisters" }
+}
+
+timer_a: Timers.MSP430_Timer @ {
+    sysbus <0x160, +0x20>;
+    sysbus new Bus.BusMultiRegistration { address: 0x012E; size: 0x2; region: "interruptVector" }
+}
+    cpu: cpu
+    acknowledgeInterrupt: 6
+    baseFrequency: 1_048_576
+    IRQ0->cpu@6
+    IRQ_IV->cpu@7
+
+timer_b: Timers.MSP430_Timer @ {
+    sysbus <0x180, +0x20>;
+    sysbus new Bus.BusMultiRegistration { address: 0x011E; size: 0x2; region: "interruptVector" }
+}
+    cpu: cpu
+    acknowledgeInterrupt: 2
+    baseFrequency: 1_048_576
+    IRQ0->cpu@2
+    IRQ_IV->cpu@3
+
+usci_a0: UART.MSP430_USCIA @ {
+    sysbus 0x5D;
+    sysbus new Bus.BusMultiRegistration { address: 0x0001; size: 0x1; region: "interruptEnable" };
+    sysbus new Bus.BusMultiRegistration { address: 0x0003; size: 0x1; region: "interruptStatus" }
+}
+    RxInterrupt->cpu@8
+    TxInterrupt->cpu@9
+
+usci_a1: UART.MSP430_USCIA @ {
+    sysbus 0xCD;
+    sysbus new Bus.BusMultiRegistration { address: 0x0006; size: 0x1; region: "interruptEnable" };
+    sysbus new Bus.BusMultiRegistration { address: 0x0007; size: 0x1; region: "interruptStatus" }
+}
+    RxInterrupt->cpu@14
+    TxInterrupt->cpu@15
+
+mpy: Miscellaneous.MSP430F2XXX_MPY @ sysbus <0x130, +0x10>
+
+boot: Memory.ArrayMemory @ sysbus 0x0C00
+    size: 0x400
+
+ram_extended: Memory.ArrayMemory @ sysbus 0x1900
+    size: 0x800
+
+code: Memory.ArrayMemory @ sysbus 0x2100
+    size: 0x1df00
+
+info_mem: Memory.ArrayMemory @ sysbus 0x1000
+    size: 0x100
+