仿真平台内核初版 -tlib库包含<sparc arm riscv powerPC>

2026-02-07 20:43:43 +08:00
parent de61f9e2b0
commit b3117648be
9748 changed files with 4309137 additions and 0 deletions
--- a/platforms/cpus/mpc5567.repl
+++ b/platforms/cpus/mpc5567.repl
@@ -0,0 +1,38 @@
+sysbus:
+    Endianess: Endianess.BigEndian
+
+cpu: CPU.PowerPc @ sysbus
+    cpuType: "e200z6"
+
+flash: Memory.MappedMemory @ sysbus 0x0
+    size: 0x200000
+
+externalMemory: Memory.MappedMemory @ sysbus 0x20000000
+    size: 0x20000000
+
+internalSram: Memory.MappedMemory @ sysbus 0x40000000
+    size: 0x14000
+
+uart: UART.MPC5567_UART @ sysbus 0xFFFB0000
+
+uart2: UART.MPC5567_UART @ sysbus 0xFFFB4000
+
+intc: IRQControllers.MPC5567_INTC @ sysbus 0xFFF48000
+    IRQ -> cpu@0
+
+fec: Network.FastEthernetController @ sysbus 0xFFF4C000
+
+emios: GPIOPort.Emios @ sysbus 0xC3FA0000
+    24 -> intc@46
+
+fmpllSynsr: Python.PythonPeripheral @ sysbus 0xC3F80004
+    size: 0x4
+    initable: false
+    script: "request.Value = 0x8"
+
+sysbus:
+    init:
+        Tag <0xFFF48000, 0xFFF4BFFF> "Interrupt controller"
+        Tag <0xC3F90040, 0xC3F90293> "SIU - Pad configuration"
+
+