218 lines
11 KiB
Plaintext
218 lines
11 KiB
Plaintext
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*** Settings ***
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Test Setup Create Machine
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*** Variables ***
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${CODE_BASE_ADDRESS} 0x8000000
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${TCM_A_VALUE} 0x12121212
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${TCM_B_VALUE} 0x34343434
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${TCM_C_VALUE} 0x56565656
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${PLAT} SEPARATOR=\n """
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... cpu: CPU.ARMv8R @ sysbus
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... ${SPACE*4}cpuType: "cortex-r52"
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... ${SPACE*4}genericInterruptController: gic
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... ${SPACE*4}init:
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... ${SPACE*4}${SPACE*4}RegisterTCMRegion sysbus.atcm0 0
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... ${SPACE*4}${SPACE*4}RegisterTCMRegion sysbus.btcm0 1
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... ${SPACE*4}${SPACE*4}RegisterTCMRegion sysbus.ctcm0 2
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...
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... timer: Timers.ARM_GenericTimer @ cpu
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... ${SPACE*4}frequency: 1000000000
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... ${SPACE*4}EL1PhysicalTimerIRQ -> gic#0@30
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... ${SPACE*4}EL1VirtualTimerIRQ -> gic#0@27
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... ${SPACE*4}NonSecureEL2PhysicalTimerIRQ -> gic#0@26
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...
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... gic: IRQControllers.ARM_GenericInterruptController @ {
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... ${SPACE*4}${SPACE*4}sysbus new Bus.BusMultiRegistration { address: 0x6E00000; size: 0x10000; region: \"distributor\" };
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... ${SPACE*4}${SPACE*4}sysbus new IRQControllers.ArmGicRedistributorRegistration { attachedCPU: cpu; address: 0x6E10000 }
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... ${SPACE*4}}
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... ${SPACE*4}\[0-1] -> cpu@[0-1]
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... ${SPACE*4}supportsTwoSecurityStates: false
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...
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... code: Memory.MappedMemory @ sysbus ${CODE_BASE_ADDRESS}
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... ${SPACE*4}size: 0x10000
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...
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... atcm0: Memory.MappedMemory @ {sysbus new Bus.BusPointRegistration { address: 0x0; cpu: cpu }}
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... ${SPACE*4}size: 0x10000
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... ${SPACE*4}init:
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... ${SPACE*4}${SPACE*4}FillWithRepeatingData [${TCM_A_VALUE}] // NB. the value gets truncated to a byte here
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...
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... btcm0: Memory.MappedMemory @ {sysbus new Bus.BusPointRegistration { address: 0x20000; cpu: cpu }}
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... ${SPACE*4}size: 0x20000
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... ${SPACE*4}init:
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... ${SPACE*4}${SPACE*4}FillWithRepeatingData [${TCM_B_VALUE}]
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...
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... ctcm0: Memory.MappedMemory @ {sysbus new Bus.BusPointRegistration { address: 0x40000; cpu: cpu }}
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... ${SPACE*4}size: 0x40000
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... ${SPACE*4}init:
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... ${SPACE*4}${SPACE*4}FillWithRepeatingData [${TCM_C_VALUE}]
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... """
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${NEW_TCM_A_ADDRESS} 0x60000
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${NEW_TCM_B_ADDRESS} 0x00000
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${NEW_TCM_C_ADDRESS} 0x20000
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${TCM_TEST_ASSEMBLY} SEPARATOR=\n """
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... // Store mask in R2
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... MOV r2, 0x1fff
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...
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... // Move TCM A to ${NEW_TCM_A_ADDRESS}
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... MRC p15, 0, r0, c9, c1, 0
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... AND r0, r2
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... MOV r1, ${NEW_TCM_A_ADDRESS}
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... ORR r0, r1, LSL #13
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... MCR p15, 0, r0, c9, c1, 0
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...
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... // Move TCM B to ${NEW_TCM_B_ADDRESS}
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... MRC p15, 0, r0, c9, c1, 1
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... AND r0, r2
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... MOV r1, ${NEW_TCM_B_ADDRESS}
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... ORR r0, r1, LSL #13
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... MCR p15, 0, r0, c9, c1, 1
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...
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... // Move TCM C to ${NEW_TCM_C_ADDRESS}
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... MRC p15, 0, r0, c9, c1, 2
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... AND r0, r2
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... MOV r1, ${NEW_TCM_C_ADDRESS}
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... ORR r0, r1, LSL #13
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... MCR p15, 0, r0, c9, c1, 2
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...
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... // Read values to registers
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... MOV r0, ${NEW_TCM_A_ADDRESS}
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... LDR r0, [r0] // ${TCM_A_VALUE}
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... MOV r1, ${NEW_TCM_B_ADDRESS}
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... LDR r1, [r1] // ${TCM_B_VALUE}
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... MOV r2, ${NEW_TCM_C_ADDRESS}
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... LDR r2, [r2] // ${TCM_C_VALUE}
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...
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... // Loop indefinitely
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... B .
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... """
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# This snippet assumes that target EL configuration is in R1
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${TCM_EL_ACCESS_TEST_ASSEMBLY} SEPARATOR=\n """
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... // Store mask in R2
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... MVN r2, 0x3
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...
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... // Enable TCM at given EL
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... MRC p15, 0, r0, c9, c1, 0
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... AND r0, r2
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... ORR r0, r1
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... MCR p15, 0, r0, c9, c1, 0
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...
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... read_label:
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... // Read values to registers
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... MOV r0, 0x0
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... LDR r0, [r0] // ${TCM_A_VALUE}
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...
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... // Loop indefinitely
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... B read_label
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... """
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${R0_REGISTER_INDEX} 100
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${R1_REGISTER_INDEX} 101
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${R2_REGISTER_INDEX} 102
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*** Keywords ***
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Get System Register As Int
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[Arguments] ${reg_name}
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${as_str}= Execute Command cpu GetSystemRegisterValue ${reg_name}
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${as_int}= Convert To Integer ${as_str}
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RETURN ${as_int}
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Get Register Field
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[Arguments] ${int_value} ${start_offset} ${mask}
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${field_val}= Evaluate ((${int_value} >> ${start_offset}) & ${mask})
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RETURN ${field_val}
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Field Should Have Correct Value
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[Arguments] ${register_name} ${field_offset} ${field_mask} ${expected_value} ${error_message}
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${reg_value}= Get System Register As Int ${register_name}
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${field_value}= Get Register Field ${reg_value} ${field_offset} ${field_mask}
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Should Be Equal As Integers ${field_value} ${expected_value} ${error_message}
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Create Machine
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Execute Command mach create
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Execute Command machine LoadPlatformDescriptionFromString ${PLAT}
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Execute Command using sysbus
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*** Test Cases ***
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# TCM tests
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ID_MMFR0 Register Should Have Correct Value
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[Template] Field Should Have Correct Value
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"ID_MMFR0" 16 0b1111 0b0001 ID_MMFR0 TCM bit should be enabled
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TCMType Register Should Have Correct Value
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[Template] Field Should Have Correct Value
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"TCMTR" 0 0b111 0b111 ABC enabled region bits incorrect
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"TCMTR" 29 0b1111 0b100 TCM bits incorrect
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IMP_.TCMREGIONR Should Have Correct Value
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[Template] Field Should Have Correct Value
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"IMP_ATCMREGIONR" 2 0b11111 0b00111 TCM A region size mismatch
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"IMP_ATCMREGIONR" 0 0xFFFFF000 0x0 TCM A region base address mismatch
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"IMP_BTCMREGIONR" 2 0b11111 0b01000 TCM B region size mismatch
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"IMP_BTCMREGIONR" 0 0xFFFFF000 0x20000 TCM B region base address mismatch
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"IMP_CTCMREGIONR" 2 0b11111 0b01001 TCM C region size mismatch
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"IMP_CTCMREGIONR" 0 0xFFFFF000 0x40000 TCM C region base address mismatch
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Should Remap TCM Regions
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Execute Command cpu AssembleBlock ${CODE_BASE_ADDRESS} ${TCM_TEST_ASSEMBLY}
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Execute Command cpu PC ${CODE_BASE_ADDRESS}
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Execute Command emulation RunFor "0.01"
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Register Should Be Equal ${R0_REGISTER_INDEX} ${TCM_A_VALUE}
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Register Should Be Equal ${R1_REGISTER_INDEX} ${TCM_B_VALUE}
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Register Should Be Equal ${R2_REGISTER_INDEX} ${TCM_C_VALUE}
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Should Disable TCM Region At EL0 and EL1
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Create Log Tester 0
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Execute Command cpu PC ${CODE_BASE_ADDRESS}
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Execute Command cpu AssembleBlock `cpu PC` ${TCM_EL_ACCESS_TEST_ASSEMBLY}
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Execute Command cpu SetRegister "R1" 0x2
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Execute Command allowPrivates true
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Execute Command cpu Step 5
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Execute Command cpu ExceptionLevel EL2_HypervisorMode
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Execute Command cpu Step 3
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Should Not Be In Log sysbus: Tried to read 4 bytes at 0x0, with incorrect permissions, returning 0.
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Register Should Be Equal R0 ${TCM_A_VALUE}
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Execute Command cpu ExceptionLevel EL1_SystemMode
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Execute Command cpu Step 3
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Wait For Log Entry sysbus: Tried to read 4 bytes at 0x0, with incorrect permissions, returning 0.
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Register Should Be Equal R0 0
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Execute Command cpu ExceptionLevel EL0_UserMode
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Execute Command cpu Step 3
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Wait For Log Entry sysbus: Tried to read 4 bytes at 0x0, with incorrect permissions, returning 0.
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Register Should Be Equal R0 0
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Should Disable TCM Region At EL2
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Create Log Tester 0
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Execute Command cpu PC ${CODE_BASE_ADDRESS}
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Execute Command cpu AssembleBlock `cpu PC` ${TCM_EL_ACCESS_TEST_ASSEMBLY}
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Execute Command cpu SetRegister "R1" 0x1
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Execute Command allowPrivates true
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Execute Command cpu Step 5
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Execute Command cpu ExceptionLevel EL2_HypervisorMode
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Execute Command cpu Step 3
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Wait For Log Entry sysbus: Tried to read 4 bytes at 0x0, with incorrect permissions, returning 0.
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Register Should Be Equal R0 0
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Execute Command cpu ExceptionLevel EL1_SystemMode
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Execute Command cpu Step 3
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Should Not Be In Log sysbus: Tried to read 4 bytes at 0x0, with incorrect permissions, returning 0.
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Register Should Be Equal R0 ${TCM_A_VALUE}
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Execute Command cpu ExceptionLevel EL0_UserMode
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Execute Command cpu Step 3
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Should Not Be In Log sysbus: Tried to read 4 bytes at 0x0, with incorrect permissions, returning 0.
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Register Should Be Equal R0 ${TCM_A_VALUE}
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