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simulation_core/platforms/cpus/litex_vexriscv.repl

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using "./litex_common.repl"
cpu: CPU.VexRiscv @ sysbus
cpuType: "rv32im_zicsr_zifencei"
clock0: Miscellaneous.LiteX_MMCM_CSR32 @ sysbus 0xe0004800
timer: Timers.LiteX_Timer_CSR32 @ {
sysbus 0x60002800;
sysbus 0xE0002800 // shadow
}
frequency: 100000000
timer:
-> cpu@1
uart:
-> cpu@2
eth:
-> cpu@3