122 lines
3.1 KiB
Plaintext
122 lines
3.1 KiB
Plaintext
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program: Memory.MappedMemory @ sysbus 0x0
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size: 0x00040000
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flexnvm: Memory.MappedMemory @ sysbus 0x10000000
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size: 0x00008000
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// Should be 0x800 + 0x80 for CSE_PRAM, but internal
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// limitations require us to align regions to 0x400
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flexram: Memory.MappedMemory @ sysbus 0x14000000
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size: 0x00000800
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sram_l: Memory.MappedMemory @ sysbus 0x1C000000
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size: 0x4000000
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sram_u: Memory.MappedMemory @ sysbus 0x20000000
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size: 0x5800
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nvic: IRQControllers.NVIC @ sysbus 0xE000E000
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priorityMask: 0xF0
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systickFrequency: 72000000
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IRQ -> cpu@0
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cpu: CPU.CortexM @ sysbus
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cpuType: "cortex-m0+"
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nvic: nvic
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dwt: Miscellaneous.DWT @ sysbus 0xE0001000
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frequency: 48000000
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lpspi0: SPI.IMXRT_LPSPI @ sysbus 0x4002C000
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-> nvic@26
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lpspi1: SPI.IMXRT_LPSPI @ sysbus 0x4002D000
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-> nvic@27
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lpuart0: UART.NXP_LPUART @ sysbus 0x4006A000
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IRQ -> nvic@31
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lpuart1: UART.NXP_LPUART @ sysbus 0x4006B000
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IRQ -> nvic@30
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can0_mcr: Python.PythonPeripheral @ sysbus 0x40024000
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size: 0x4
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initable: true
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filename: "scripts/pydev/flipflop.py"
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lpit: Timers.S32K_LPIT @ sysbus 0x40037000
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frequency: 5000
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IRQ -> nvic@20
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lptmr: Timers.S32K_LPTMR @ sysbus 0x40040000
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-> nvic@8
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frequency: 80000000
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portGPIO: Miscellaneous.CombinedInput
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numberOfInputs: 5
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-> nvic@9
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portA: GPIOPort.NXPGPIOPort @ {
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sysbus new Bus.BusMultiRegistration { address: 0x400FF000; size: 0x40; region: "gpio" };
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sysbus new Bus.BusMultiRegistration { address: 0x40049000; size: 0xD0; region: "port" }
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}
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numberOfPins: 12
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-> portGPIO@0
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portB: GPIOPort.NXPGPIOPort @ {
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sysbus new Bus.BusMultiRegistration { address: 0x400FF040; size: 0x40; region: "gpio" };
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sysbus new Bus.BusMultiRegistration { address: 0x4004A000; size: 0xD0; region: "port" }}
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numberOfPins: 10
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-> portGPIO@1
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portC: GPIOPort.NXPGPIOPort @ {
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sysbus new Bus.BusMultiRegistration { address: 0x400FF080; size: 0x40; region: "gpio" };
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sysbus new Bus.BusMultiRegistration { address: 0x4004B000; size: 0xD0; region: "port" }}
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numberOfPins: 14
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-> portGPIO@2
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portD: GPIOPort.NXPGPIOPort @ {
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sysbus new Bus.BusMultiRegistration { address: 0x400FF0C0; size: 0x40; region: "gpio" };
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sysbus new Bus.BusMultiRegistration { address: 0x4004C000; size: 0xD0; region: "port" }}
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numberOfPins: 10
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-> portGPIO@3
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portE: GPIOPort.NXPGPIOPort @ {
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sysbus new Bus.BusMultiRegistration { address: 0x400FF100; size: 0x40; region: "gpio" };
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sysbus new Bus.BusMultiRegistration { address: 0x4004D000; size: 0xD0; region: "port" }}
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numberOfPins: 12
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-> portGPIO@4
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scg: Miscellaneous.S32K_SCG @ sysbus 0x40064000
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sysbus:
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init:
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ApplySVD @https://dl.antmicro.com/projects/renode/S32K118.svd-s_4356973-8b6f35da75a942816cd0d662d28a690e8b3484e3
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Tag <0x40024000, 0x40024003> "CAN0:MCR" 0x0
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Tag <0x40038000, 0x40038003> "FTM0:SC" 0x1
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Tag <0x400650DC, 0x400650DF> "PPC:PPC_LPIT" 0xF9FFFFFF
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Tag <0x400651A8, 0x400651AB> "PPC:PPC_LPUART0" 0xF9FFFFFF
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Tag <0x400651AC, 0x400651AF> "PPC:PPC_UART" 0xF9FFFFFF
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