144 lines
3.5 KiB
Plaintext
144 lines
3.5 KiB
Plaintext
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U74_2: CPU.RiscV64 @ sysbus
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cpuType: "rv64gc"
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hartId: 1
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privilegedArchitecture: PrivilegedArchitecture.Priv1_10
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timeProvider: clint
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U74_1: CPU.RiscV64 @ sysbus
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cpuType: "rv64gc"
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hartId: 0
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privilegedArchitecture: PrivilegedArchitecture.Priv1_10
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timeProvider: clint
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dtim: Memory.MappedMemory @sysbus 0x0100000
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size: 0x2000
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itim0: Memory.MappedMemory @sysbus 0x01808000
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size: 0x8000
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itim1: Memory.MappedMemory @sysbus 0x01820000
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size: 0x8000
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clint: IRQControllers.CoreLevelInterruptor @ sysbus 0x02000000
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frequency: 6250000
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numberOfTargets: 2
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[0, 1] -> U74_1@[3, 7]
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[2, 3] -> U74_2@[3, 7]
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L2LIM: Memory.MappedMemory @sysbus 0x08000000
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size: 0x200000
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plic: IRQControllers.PlatformLevelInterruptController @ sysbus 0x0c000000
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[0, 1] -> U74_1@[11, 9]
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[2, 3] -> U74_2@[11, 9]
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numberOfSources: 127
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numberOfContexts: 4
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prioritiesEnabled : true
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rstgen: Python.PythonPeripheral @ sysbus 0x11840000
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size: 0x20
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initable: true
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script: '''
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if request.IsInit:
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regs=[0xffffffff,
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0xffffffff,
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0xffffffff,
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0xffffffff]
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mask=[0xfffff3fb,
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0xffffffe7,
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0xfffffffe,
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0xffffffff]
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elif request.IsRead:
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offset = (request.Offset//4) & 0x7
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if offset & 4 == 0:
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request.Value = regs[offset & 0x3] & 0xffffffff
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else:
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request.Value = (regs[offset & 0x3] ^ mask[offset & 0x3]) & 0xffffffff
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elif request.IsWrite:
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offset = (request.Offset//4) & 0x3
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regs[offset] = request.Value
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'''
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audiorstgen: Python.PythonPeripheral @ sysbus 0x10490000
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size: 0x8
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initable: true
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script: '''
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if request.IsInit:
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reg = 0xffffffff
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elif request.IsRead:
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offset = request.Offset//4
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if offset == 0:
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request.Value = reg & 0xffffffff
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else:
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request.Value = ~reg & 0xffffffff
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elif request.IsWrite:
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reg = request.Value
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'''
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voutsysrstgen: Python.PythonPeripheral @ sysbus 0x12250000
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size: 0x8
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initable: true
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script: '''
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if request.IsInit:
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reg = 0xffffffff
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elif request.IsRead:
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offset = request.Offset//4
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if offset == 0:
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request.Value = reg & 0xffffffff
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else:
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request.Value = ~reg & 0xffffffff
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elif request.IsWrite:
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reg = request.Value
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'''
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uart0: UART.NS16550@sysbus 0x11870000
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wideRegisters: true
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IRQ -> plic@92
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uart1: UART.NS16550@sysbus 0x11880000
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wideRegisters: true
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IRQ -> plic@93
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uart2: UART.NS16550@sysbus 0x12430000
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wideRegisters: true
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IRQ -> plic@72
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uart3: UART.NS16550@sysbus 0x12440000
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wideRegisters: true
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IRQ -> plic@73
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pwm0: HiFive_PWM @sysbus 0x12490000
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gpio: GPIOPort.SiFive_GPIO @sysbus 0x1191000
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SoCSRAM: Memory.MappedMemory @sysbus 0x18000000
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size: 0x20000
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spi2: SPI.DesignWare_SPI@sysbus 0x12410000
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transmitDepth: 128
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receiveDepth: 128
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IRQ -> plic@70
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ethernet: Network.SynopsysEthernetMAC @sysbus 0x10020000
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IRQ -> plic@6
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version: SynopsysEthernetVersion.BeagleV
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sysbus:
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init:
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SilenceRange <0x02010000 0x1000>
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Tag <0x10000000 0x10000> "SDIO"
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Tag <0x104C0000 0x40000> "USB30"
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Tag <0x11860000 0x10000> "QSPI"
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Tag <0x118B0000 0x10000> "I2C0"
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Tag <0x118C0000 0x10000> "I2C1"
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Tag <0x12450000 0x10000> "I2C1"
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Tag <0x100b0000 0x10000> "sgdam2"
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Tag <0x10500000 0x10000> "sgdam1"
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Tag <0x11910000 0x10000> "GPIO"
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Tag <0x11800000 0x10000> "CLKGEN_CSR"
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Tag <0x11850000 0x10000> "SYSCTRL"
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Tag <0x118D0000 0x10000> "TRNG"
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Tag <0x10480000 0x30000> "DOM_AUDIO"
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Tag <0x12240000 0x30000> "VOUT"
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