Files
FPGA_DESIGN_IP/stream_rx_buffer/sim/functions.tcl
2026-03-06 16:22:17 +08:00

40 lines
1.3 KiB
Tcl

#usage: "do xxx.tcl timing" for timing simulation and "do xxx.tcl" for functional simulation
#get the current script file name by [info frame],walk through all frame return lines
#here we use the "do ..." command to start this script,so we can't use the [info script]
#command to start this script
#with the "do ..." command,we can start this script with command line options,and we
#can refercen these options by $1,$2,etc.
proc get_file_name { } {
set file_name 0
catch {
set max_info [info frame]
puts "maxinfo=$max_info"
puts "...................................."
for {set a $max_info} {$a>0} {incr a -1} {
puts $a
set framestring [info frame $a];
puts $framestring;
set cmdstring [dict get $framestring cmd]; #extract command with "cmd" key
if {[string match *case*.tcl* $cmdstring]} { #search "do xxx.tcl timing" patten
puts $cmdstring
set ary [split $cmdstring " "]
puts $ary
set file_name [lindex $ary 1]
puts $file_name
break
}
}
}
return $file_name
}
proc get_case_num {case_name} {
regsub {[a-z]*} $case_name {} case_num
# puts $case_num
return $case_num
}