Files
FPGA_DESIGN_IP/new_project_rtl_template/sim/suppresswarning.tcl
2026-03-06 16:22:17 +08:00

22 lines
704 B
Tcl

#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#0=note,1=warning,2=error,3=failure,4=fatal
# set BreakOnAssertion 3 ;
# set IgnoreNote 1 ;
# set IgnoreWarning 1 ;
# #set IgnoreError 1 ;
# #set IgnoreFailure 1 ;
# set IgnoreSVAInfo 1 ;
# set IgnoreSVAWarning 1 ;
# #set IgnoreSVAError 1 ;
# #set IgnoreSVAFatal 1 ;
# set NumericStdNoWarnings 1 ;
# set StdArithNoWarnings 1 ;