create_clock -period  10    -period 25     -name   sysclk                [get_ports Top_level_scan/SYSCLK     ]  
create_generated_clock  -source  [get_ports Top_level_scan/SYSCLK ]      -name sysclk_y  [get_pins Top_level_scan/AA/y ]

create_generated_clock  -source  [get_pins Top_level_scan/AA/y  ]      -name tsc_sysclk   [get_ports Top_level_scan/TSC_SYSCLK ] -divide_by 2
create_generated_clock  -source  [get_ports Top_level_scan/TSC_SYSCLK ]      -name tsc_sysclk_y  [get_pins Top_level_scan/CC/y ]


set_clock_groups -asynchronous -group  {sysclk tsc_sysclk sysclk_y tsc_sysclk_y}

#report_attributes [get_port tsc_sysclk]
#the $name is a predefined variable
set_input_delay 5 -clock tsc_sysclk [all_inputs -filter {[string match -nocase *tsc_* $name]}]
set_input_delay 5 -clock tsc_sysclk [all_inouts -filter {[string match -nocase *tsc_* $name]}]
set_input_delay 5 -clock sysclk_y [all_inputs -filter {[string match -nocase *DATA_BUS* $name]}]