leguoqing/FPGA_DESIGN_IP
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eesimple
2026-03-06 16:22:17 +08:00
commit b8fe9f77ec
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stream_tx_buffer/sim/clear.tcl Normal file
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#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
#ATTTION : MODIFY THIS FILE AS YOU WANT
echo on
#quit from current runing simulation
quit -sim
#clear the transcript window,only valid in batch mode
if [batch_mode] {
# log /*
} else {
.main clear
}