leguoqing/FPGA_DESIGN_IP
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

首次提交

Browse Source
This commit is contained in:
eesimple
2026-03-06 16:22:17 +08:00
commit b8fe9f77ec
465 changed files with 115939 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
ssp_tx/sim/file_ver.f Normal file
View File

@@ -0,0 +1,6 @@
+define+__MICROSATE_SIM__
vip_clock.sv
tb.sv
../glbl.v
../../src/ssp_tx.sv
../../../ssp_rx/src/ssp_rx.sv