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21
new_project_rtl_template/sim/func001/addwave.tcl
Normal file
21
new_project_rtl_template/sim/func001/addwave.tcl
Normal file
@@ -0,0 +1,21 @@
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echo off
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#useage do addwave.tcl uart,where uart is a module name
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#when there is mulitple matches,the 1st one is picked
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puts "---->find by design unit:$1"
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set patten *$1*;
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#puts "---->find patten:$patten"
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set rslt [find instance -bydu $patten];
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#puts "---->find result:$rslt"
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regsub {\{} $rslt "" rslt;
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regsub {\}} $rslt "" rslt;
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regsub { (.*)} $rslt "" path;
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#puts "---->design path is:$path"
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set signal_list ${path}/*
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puts "---->list to be add to wave:$signal_list"
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add wave $signal_list
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22
new_project_rtl_template/sim/func001/can_transceiver.sv
Normal file
22
new_project_rtl_template/sim/func001/can_transceiver.sv
Normal file
@@ -0,0 +1,22 @@
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/*
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can bus physical model by leguoqing
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*/
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module can_transceiver
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(
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output logic rxd = 1,
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input logic txd,
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inout tri1 line
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);
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always@(*)
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if (line == 1'b0) rxd <= 1'b0;
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else rxd <= 1'b1;
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logic line_reg;
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always@(*)
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if (txd == 0) line_reg <= 0;
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else line_reg <= 1;
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assign line = line_reg ? 1'bz : 0;
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endmodule
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254
new_project_rtl_template/sim/func001/cmsdk_uart_capture_ard.v
Normal file
254
new_project_rtl_template/sim/func001/cmsdk_uart_capture_ard.v
Normal file
@@ -0,0 +1,254 @@
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//-----------------------------------------------------------------------------
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// The confidential and proprietary information contained in this file may
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// only be used by a person authorised under and to the extent permitted
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// by a subsisting licensing agreement from ARM Limited.
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//
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// (C) COPYRIGHT 2010-2013 ARM Limited.
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// ALL RIGHTS RESERVED
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//
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// This entire notice must be reproduced on all copies of this file
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// and copies of this file may only be made by a person if such person is
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// permitted to do so under the terms of a subsisting license agreement
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// from ARM Limited.
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//
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// SVN Information
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//
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// Checked In : $Date: 2013-02-08 10:40:04 +0000 (Fri, 08 Feb 2013) $
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//
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// Revision : $Revision: 365823 $
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//
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// Release Information : CM3DesignStart-r0p0-02rel0
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//
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//-----------------------------------------------------------------------------
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//-----------------------------------------------------------------------------
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// Abstract : A device to capture serial data
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//-----------------------------------------------------------------------------
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// This module assume CLK is same frequency as baud rate.
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// In the example UART a test mode is used to enable data output as maximum
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// speed (PCLK). In such case we can connect CLK signal directly to PCLK.
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// Otherwise, if the UART baud rate is reduced, the CLK rate has to be reduced
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// accordingly as well.
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//
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// This module stop the simulation when character 0x04 is received.
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// An output called SIMULATION_END is set for 1 cycle before simulation is
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// terminated to allow other testbench component like profiler (if any)
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// to output reports before the simulation stop.
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//
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// This model also support ESCAPE (0x1B, decimal 27) code sequence
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// ESC - 0x10 - XY Capture XY to AUXCTRL output
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// ESC - 0x11 Set DEBUG_TESTER_ENABLE to 1
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// ESC - 0x12 Clear DEBUG_TESTER_ENABLE to 0
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module cmsdk_uart_capture_ard (
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input wire RESETn, // Power on reset
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input wire CLK, // Clock (baud rate)
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input wire RXD, // Received data
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output wire SIMULATIONEND, // Simulation end indicator
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output wire DEBUG_TESTER_ENABLE, // Enable debug tester
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output wire [7:0] AUXCTRL, // Auxiliary control
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output wire SPI0, // Shield0 SPI enable
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output wire SPI1, // Shield1 SPI enable
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output wire I2C0, // Shield0 I2C enable
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output wire I2C1, // Shield1 I2C enable
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output wire UART0, // Shield0 UART enable
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output wire UART1); // Shield1 UART enable
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reg [8:0] rx_shift_reg;
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wire[8:0] nxt_rx_shift;
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reg [6:0] string_length;
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reg [7:0] tube_string [127:0];
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reg [7:0] text_char;
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integer i;
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reg nxt_end_simulation;
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reg reg_end_simulation;
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wire char_received;
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reg reg_esc_code_mode; // Escape code mode
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reg reg_aux_ctrl_mode; // Auxiliary control capture mode
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reg [7:0] reg_aux_ctrl; // Registered Auxiliary control
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reg reg_dbgtester_enable;
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reg SPI0_reg;
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reg SPI1_reg;
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reg I2C0_reg;
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reg I2C1_reg;
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reg UART0_reg;
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reg UART1_reg;
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// Receive shift register
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assign nxt_rx_shift = {RXD,rx_shift_reg[8:1]};
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assign char_received = (rx_shift_reg[0]==1'b0);
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initial
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begin
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SPI0_reg <= 1'b0;
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SPI1_reg <= 1'b0;
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I2C0_reg <= 1'b0;
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I2C1_reg <= 1'b0;
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UART0_reg <= 1'b0;
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UART1_reg <= 1'b0;
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end
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always @(posedge CLK or negedge RESETn)
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begin
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if (~RESETn)
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rx_shift_reg <= {9{1'b1}};
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else
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if (rx_shift_reg[0]==1'b0) // Start bit reach bit[0]
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rx_shift_reg <= {9{1'b1}};
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else
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rx_shift_reg <= nxt_rx_shift;
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end
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// Escape code mode register
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always @(posedge CLK or negedge RESETn)
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begin
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if (~RESETn)
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reg_esc_code_mode <= 1'b0;
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else // Set to escape mode if ESC code is detected
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if (char_received & (reg_esc_code_mode==1'b0) & (rx_shift_reg[8:1]==8'h1B))
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reg_esc_code_mode <= 1'b1;
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else if (char_received)
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reg_esc_code_mode <= 1'b0;
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end
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// Aux Ctrl capture mode register
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always @(posedge CLK or negedge RESETn)
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begin
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if (~RESETn)
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reg_aux_ctrl_mode <= 1'b0;
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else // Set to Aux control capture mode if ESC-0x10 sequence is detected
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if (char_received & (reg_esc_code_mode==1'b1) & (rx_shift_reg[8:1]==8'h10))
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reg_aux_ctrl_mode <= 1'b1;
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else if (char_received)
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reg_aux_ctrl_mode <= 1'b0;
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end
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// Aux Ctrl capture data register
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always @(posedge CLK or negedge RESETn)
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begin
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if (~RESETn)
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reg_aux_ctrl <= {8{1'b0}};
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else // Capture received data to Aux control output if reg_aux_ctrl_mode is set
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if (char_received & (reg_aux_ctrl_mode==1'b1))
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reg_aux_ctrl <= rx_shift_reg[8:1];
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end
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assign AUXCTRL = reg_aux_ctrl;
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// Debug tester enable
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always @(posedge CLK or negedge RESETn)
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begin
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if (~RESETn)
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reg_dbgtester_enable <= 1'b0;
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else // Enable debug tester if ESC-0x11 sequence is detected
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if (char_received & (reg_esc_code_mode==1'b1) & (rx_shift_reg[8:1]==8'h11))
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reg_dbgtester_enable <= 1'b1;
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else if (char_received & (reg_esc_code_mode==1'b1) & (rx_shift_reg[8:1]==8'h12))
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// Disable debug tester if ESC-0x12 sequence is detected
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reg_dbgtester_enable <= 1'b0;
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end
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assign DEBUG_TESTER_ENABLE = reg_dbgtester_enable;
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// Message display
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always @ (posedge CLK or negedge RESETn)
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begin: p_tube
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if (~RESETn)
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begin
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string_length = 7'b0;
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nxt_end_simulation <= 1'b0;
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for (i=0; i<= 127; i=i+1) begin
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tube_string [i] = 8'h00;
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end
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end
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else
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if (char_received)
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begin
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if ((rx_shift_reg[8:1]==8'h1B) | reg_esc_code_mode | reg_aux_ctrl_mode )
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begin
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// Escape code, or in escape code mode
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// Data receive can be command, aux ctrl data
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// Ignore this data
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end
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else if (rx_shift_reg[8:1]==8'h04) // Stop simulation if 0x04 is received
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nxt_end_simulation <= 1'b1;
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else if ((rx_shift_reg[8:1]==8'h0d)|(rx_shift_reg[8:1]==8'h0A))
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// New line
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begin
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tube_string[string_length] = 8'h00;
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$write("%t UART: ",$time);
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for (i=0; i<= string_length; i=i+1)
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begin
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text_char = tube_string[i];
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$write("%s",text_char);
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end
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$write("\n");
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string_length = 7'b0;
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end
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else if (rx_shift_reg[8:1]==8'h0F)
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begin
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$write("%t UART: Switching on Shield I2C, SPI and UART\n",$time);
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SPI0_reg <= 1'b1;
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SPI1_reg <= 1'b1;
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I2C0_reg <= 1'b1;
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I2C1_reg <= 1'b1;
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UART0_reg <= 1'b1;
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UART1_reg <= 1'b1;
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end
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else
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begin
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tube_string[string_length] = rx_shift_reg[8:1];
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string_length = string_length + 1;
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if (string_length >79) // line too long, display and clear buffer
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begin
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tube_string[string_length] = 8'h00;
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$write("%t UART: ",$time);
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for (i=0; i<= string_length; i=i+1)
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begin
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text_char = tube_string[i];
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$write("%s",text_char);
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end
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$write("\n");
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string_length = 7'b0;
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|
||||
end
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|
||||
end
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||||
|
||||
end
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||||
|
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end // p_TUBE
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|
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// Delay for simulation end
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always @ (posedge CLK or negedge RESETn)
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begin: p_sim_end
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if (~RESETn)
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begin
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reg_end_simulation <= 1'b0;
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||||
end
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else
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reg_end_simulation <= nxt_end_simulation;
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if (reg_end_simulation==1'b1)
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||||
begin
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||||
$write("%t UART: Test Ended\n",$time);
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||||
$stop;
|
||||
end
|
||||
|
||||
end
|
||||
|
||||
assign SIMULATIONEND = nxt_end_simulation & ~reg_end_simulation;
|
||||
|
||||
assign SPI0 = SPI0_reg;
|
||||
assign SPI1 = SPI1_reg;
|
||||
assign I2C0 = I2C0_reg;
|
||||
assign I2C1 = I2C1_reg;
|
||||
assign UART0 = UART0_reg;
|
||||
assign UART1 = UART1_reg;
|
||||
|
||||
endmodule
|
||||
27
new_project_rtl_template/sim/func001/debussy.bat
Normal file
27
new_project_rtl_template/sim/func001/debussy.bat
Normal file
@@ -0,0 +1,27 @@
|
||||
::关闭回显
|
||||
@ECHO OFF
|
||||
::设置软件路径
|
||||
SET Debussy=C:\Novas\Debussy\bin\Debussy.exe
|
||||
SET vericom=C:\Novas\Debussy\bin\vericom.exe
|
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SET vhdlcom=C:\Novas\Debussy\bin\vhdlcom.exe
|
||||
|
||||
::===== import design from file (compile design into ram) =====
|
||||
::仅适用于纯 v/sv 工程
|
||||
%Debussy% -sv -f ../file_ver.f
|
||||
|
||||
::===== import design from library (compile design into library) =====
|
||||
::适用于 混合语言工程 和 纯 v/sv 工程
|
||||
::%vericom% -sv -2001 -f file_ver.f
|
||||
::%vhdlcom% -2000 -f file_vhd.f
|
||||
::%Debussy% -lib work -top top &
|
||||
|
||||
::删除波形文件
|
||||
::DEL Debussy.fsdb /q
|
||||
|
||||
::删除Debussy生成的相关文件
|
||||
RD Debussy.exeLog /s /q
|
||||
DEL novas.rc /q
|
||||
|
||||
::退出命令行
|
||||
EXIT
|
||||
|
||||
@@ -0,0 +1,143 @@
|
||||
#usage : do find_unreferenced_sources.tcl [-d]
|
||||
# if -d is not specified,only list out the unrefferenced files
|
||||
# the script does:
|
||||
# step 1 :generate the report
|
||||
# step 2 :get all referced files from the report
|
||||
# step 3 :get all compiled files from the 01_source/01_func directory
|
||||
# step 4 :compare the two list,find out the unrefferenced ones
|
||||
# step 5:optionnnaly,delete the unrefferenced files
|
||||
# step 6: remove the generated reports
|
||||
|
||||
proc relative_to_absolute {relative_path} {
|
||||
|
||||
#replace all "../" and count how many "../" occured in the original string
|
||||
set parent_dir_count [regsub -all {\.\.\/} $relative_path "" sufix_path];
|
||||
set redir_path [pwd];
|
||||
|
||||
#cut the current path by N-times to get the common parent path for both "abs" and "rela"
|
||||
for {set i 0 } {$i < $parent_dir_count} {incr i} {
|
||||
set last_dir [file tail $redir_path];
|
||||
regsub /$last_dir $redir_path "" redir_path;
|
||||
}
|
||||
set prefix_path $redir_path;
|
||||
# puts redir_path=$redir_path
|
||||
set absolute_path $prefix_path/$sufix_path;
|
||||
|
||||
return $absolute_path;
|
||||
}
|
||||
|
||||
|
||||
proc find_files {root_path } {
|
||||
set results [list];
|
||||
# lappend results;
|
||||
|
||||
#store the current path
|
||||
set current_path [pwd];
|
||||
cd $root_path;
|
||||
set root_path [pwd];
|
||||
|
||||
puts "entering $root_path"
|
||||
# get all files recusively
|
||||
foreach element [glob -nocomplain * ;] {
|
||||
|
||||
# entering sub dirs
|
||||
if { [file isdirectory $element]} {
|
||||
|
||||
set sublist [find_files $element];
|
||||
set results [concat $results $sublist];
|
||||
} else {
|
||||
# only valid source files are filtered
|
||||
if {[string match "*.v" $element] || [string match "*.sv" $element] || [string match "*.vhd" $element] || [string match "*.vhdl" $element]} {
|
||||
lappend results "$root_path/$element";
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
cd $current_path;
|
||||
|
||||
puts "++++++++++++++++++++++++++++"
|
||||
return $results;
|
||||
}
|
||||
|
||||
.main clear
|
||||
#exit simulation ,unless the change dir will not work
|
||||
q -sim
|
||||
|
||||
puts "---------------------------------ATTENTION----------------------------------------"
|
||||
puts "----------- this file should be sourced after the vsim load sucessfully-----------"
|
||||
puts "----------- this file should be sourced from the funcXXX director-----------------"
|
||||
puts ""
|
||||
|
||||
|
||||
puts ":::::::::get referced dut files:::::::::"
|
||||
set referenced_files [list ]
|
||||
set f_report [open $TEMP_REF_FILES r];
|
||||
|
||||
#read the report,get all referenced files
|
||||
while {![eof $f_report]} {
|
||||
gets $f_report line ;
|
||||
|
||||
if { [string match "*Source File*" $line] } {
|
||||
lappend referenced_files $line;
|
||||
}
|
||||
}
|
||||
close $f_report
|
||||
|
||||
#remove those source file,point to precompiled vendor library
|
||||
#convert the relative path to absolute path
|
||||
#list referenced_dut_files;
|
||||
foreach element $referenced_files {
|
||||
if { [string match "*Source File: \.\./\.\./*" $element] } {
|
||||
regsub {^.*Source File:} $element "" path;
|
||||
set relative_path [string trim $path ];
|
||||
set abs_path [relative_to_absolute $relative_path];
|
||||
lappend referenced_dut_files $abs_path
|
||||
# puts $abs_path
|
||||
}
|
||||
}
|
||||
|
||||
puts ":::::::::get all compiled source files:::::::::"
|
||||
#get all source files in the source file directory ,recursively
|
||||
set root_path ../../../01_source/01_func;
|
||||
set all_sources [find_files $root_path;];
|
||||
.main clear
|
||||
|
||||
puts ":::::::::try to match:::::::::"
|
||||
#try to match the two lists,and filter the mis-matched ones
|
||||
|
||||
#set f_referenced_dut_files [open "referenced.txt" w+];
|
||||
#foreach sim_file $referenced_dut_files {
|
||||
# puts $f_referenced_dut_files $sim_file;
|
||||
#}
|
||||
#close $f_referenced_dut_files;
|
||||
|
||||
#set f_dir_files [open "dir.txt" w+];
|
||||
#foreach dir_file $all_sources {
|
||||
# puts $f_dir_files $dir_file;
|
||||
#}
|
||||
#close $f_dir_files
|
||||
|
||||
puts "found dismated files as follow:"
|
||||
set mis_matched_dir_files [list]
|
||||
foreach dir_file $all_sources {
|
||||
|
||||
set index [lsearch $referenced_dut_files $dir_file];
|
||||
if {$index == -1} {
|
||||
lappend mis_matched_dir_files $dir_file;
|
||||
puts "path=$dir_file"
|
||||
}
|
||||
}
|
||||
|
||||
#if specified the -d switch,just delete the files
|
||||
if {$argc == 1 && [string equal $1 "-d"]} {
|
||||
|
||||
puts "the -d switch specified ,delete the dismatched files automatically"
|
||||
foreach del_file $mis_matched_dir_files {
|
||||
file delete -force $del_file
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#file delete -force $TEMP_REF_FILES
|
||||
|
||||
|
||||
98
new_project_rtl_template/sim/func001/format_save.tcl
Normal file
98
new_project_rtl_template/sim/func001/format_save.tcl
Normal file
@@ -0,0 +1,98 @@
|
||||
# When open .wlf file, there is no CASE_NAME variable in context. We get the case name by searching in the struct window instead.
|
||||
if {true} {
|
||||
# raw script code in pre_format
|
||||
set pre_format {
|
||||
# When open .wlf file, there is no CASE_NAME variable in context. We get the case name by searching in the struct window instead.
|
||||
if {![info exists CASE_NAME]} {
|
||||
puts "++++++++++ search case name ++++++++++"
|
||||
set wave_sim_type func
|
||||
for {set wave_i 0} {$wave_i < 1000} {incr wave_i 1} {
|
||||
set wave_case_num [format "%03d" $wave_i];
|
||||
set wave_case_name ${wave_sim_type}${wave_case_num}
|
||||
if {[search structure $wave_case_name] >= 0} {
|
||||
break
|
||||
}
|
||||
}
|
||||
set unset_CASE_NAME true
|
||||
set CASE_NAME $wave_case_name
|
||||
}
|
||||
}
|
||||
}; list
|
||||
# from stackoverflow.com "how to keep commands quiet in TCL?"
|
||||
# if you want to inhibit such printouts in an interactive session(comes in handy from time to time), a simple hack to achieve that is to chain the command
|
||||
# you want to "silence" with a "silent" command(producing a value whose string representation is an empty string).
|
||||
# for instance: set a [open "giri.txt" r]; list
|
||||
|
||||
if {true} {
|
||||
# raw script code in post_format
|
||||
set post_format {
|
||||
if { [info exists unset_CASE_NAME] && [string equal -nocase true $unset_CASE_NAME] } {
|
||||
set unset_CASE_NAME false
|
||||
unset CASE_NAME
|
||||
}
|
||||
}
|
||||
}; list
|
||||
|
||||
# brace all to eliminate unnecessary output(example. "set fd_pre_savewave [open pre_savewave.tcl r]" will display returned value of set cmd)
|
||||
if {true} {
|
||||
# save current wave format to a tmp file
|
||||
catch {write format wave -window Wave intermediate_wave_format_file.tmp} res
|
||||
|
||||
if {$argc>=1} { # example: do savewave.tcl wave_name
|
||||
set wave_name $1
|
||||
if {[regexp {^([-\w\+]+\.)+[-\w\+]*$} $wave_name] >= 1} {
|
||||
# replace the last postfix(.tcl or .do or .) with null, i.e. delete the last postfix(including .)
|
||||
while {[regexp -nocase {(\.(tcl|do)*$)} $wave_name] >= 1} {
|
||||
regsub {(\.[-\w\+]*$)} $wave_name {} wave_name
|
||||
}
|
||||
} elseif {[regexp {^[-\w\+]+$} $wave_name] >= 1} {
|
||||
# nop
|
||||
} else {
|
||||
echo "Invalid file name $wave_name!"
|
||||
return
|
||||
}
|
||||
set fd_wave [open $wave_name.tcl w]
|
||||
echo "Wave format saved to $wave_name.tcl"
|
||||
} else { # example: do savewave.tcl
|
||||
set fd_wave [open lastwave.tcl w]
|
||||
echo "Wave format saved to lastwave.tcl"
|
||||
}
|
||||
|
||||
set fd_intermediate_wave_format_file [open intermediate_wave_format_file.tmp r]
|
||||
|
||||
# put lines in pre_format to final file(the file specified in argument $1)
|
||||
set lines [split $pre_format "\n"]
|
||||
set total_lines [llength $lines]
|
||||
for {set line_idx 0} {$line_idx < $total_lines} {incr line_idx 1} {
|
||||
set wave_format_line [lindex $lines $line_idx]
|
||||
chan puts $fd_wave $wave_format_line
|
||||
}
|
||||
|
||||
# put lines in tmp file to final file(the file specified in argument $1)
|
||||
while {[chan gets $fd_intermediate_wave_format_file wave_format_line] >= 0} {
|
||||
if {[regexp -all {\[|\]} $wave_format_line] >= 1} {
|
||||
# if [ and ] exist in line(like [10:0] or [2]), then escape them, i.e. \[ and \]
|
||||
regsub -all {\[|\]} $wave_format_line {\\&} wave_format_line
|
||||
# and then add eval in the biginning
|
||||
regsub (^) $wave_format_line {eval } wave_format_line
|
||||
}
|
||||
# make virtual signal ok
|
||||
if {[regexp -all {virtual signal} $wave_format_line] >= 1} {
|
||||
regsub -all {\{} $wave_format_line {[subst &} wave_format_line
|
||||
regsub -all {\}} $wave_format_line {&]} wave_format_line
|
||||
}
|
||||
regsub -all $CASE_NAME $wave_format_line {$CASE_NAME} wave_format_line
|
||||
chan puts $fd_wave $wave_format_line
|
||||
}
|
||||
|
||||
# put lines in post_format to final file(the file specified in argument $1)
|
||||
set lines [split $post_format "\n"]
|
||||
set total_lines [llength $lines]
|
||||
for {set line_idx 0} {$line_idx < $total_lines} {incr line_idx 1} {
|
||||
set wave_format_line [lindex $lines $line_idx]
|
||||
chan puts $fd_wave $wave_format_line
|
||||
}
|
||||
|
||||
close $fd_wave
|
||||
close $fd_intermediate_wave_format_file
|
||||
}
|
||||
280
new_project_rtl_template/sim/func001/lastwave.tcl
Normal file
280
new_project_rtl_template/sim/func001/lastwave.tcl
Normal file
@@ -0,0 +1,280 @@
|
||||
|
||||
# When open .wlf file, there is no CASE_NAME variable in context. We get the case name by searching in the struct window instead.
|
||||
if {![info exists CASE_NAME]} {
|
||||
puts "++++++++++ search case name ++++++++++"
|
||||
set wave_sim_type func
|
||||
for {set wave_i 0} {$wave_i < 1000} {incr wave_i 1} {
|
||||
set wave_case_num [format "%03d" $wave_i];
|
||||
set wave_case_name ${wave_sim_type}${wave_case_num}
|
||||
if {[search structure $wave_case_name] >= 0} {
|
||||
break
|
||||
}
|
||||
}
|
||||
set unset_CASE_NAME true
|
||||
set CASE_NAME $wave_case_name
|
||||
}
|
||||
|
||||
onerror {resume}
|
||||
quietly WaveActivateNextPane {} 0
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/read_agent_state
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/agent_en
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/mode
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/buf_ready
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/write_ping_n_or_pong
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/buf_ping_ready
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/buf_pong_ready
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/agent_en_d1
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/nand_read_start
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/nand_read_mode
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/nand_read_next_page
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/tmr_cnt
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/page_cnt
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/buf_lo_addr
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/mram_arb_req
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/mram_arb_grant
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/mram_arb_req_end
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/mram_addr
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/mram_wr_req
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/mram_wr_data
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/mram_wr_done
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/fifo_latency_cnt
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/nand_fifo_dq
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/nand_fifo_full
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/nand_fifo_empty
|
||||
add wave -noupdate -expand -group nand_read_agent /$CASE_NAME/u0_hdtest01_top/inst_nand_read_agent/nand_fifo_rd
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/state_c
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/end_m_write_tmr
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/end_read_page_tmr
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/program_req
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/program_type
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/program_ack
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/program_done
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/write_done
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/read_req
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/read_type
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/read_ack
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/read_next_page
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/program_buf_wr
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/program_buf_waddr
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/program_buf_wdata
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/program_buf_re
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/program_buf_rdata_vld
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/program_buf_rdata
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/rd_0
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/write_done
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/read_next_page
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/write_pending
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/is_writing
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/read_pending
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/is_reading
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/wait_mram_mr_f
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/wait_mram_mw_f
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/add_m_r
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/mram_arb_req
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/mram_arb_grant
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/mram_arb_req_end
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/mram_op_addr
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/mram_wr_req
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/mram_wdata
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/mram_wr_done
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/mram_rd_req
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/mram_rdata
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/mram_rd_done
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/cnt_read_page_tmr
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/add_nand_block_1
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/add_nand_block_2
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/add_nand_block_3
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/addr_die
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/addr_block
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/addr_page
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/add_col_r
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/rfifo_we
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/rfifo_re
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/rfifo_data_out
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/rfifo_full
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/rfifo_empty
|
||||
add wave -noupdate -group nand_ctrl /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/rfifo_q
|
||||
add wave -noupdate -group arbiter /$CASE_NAME/u0_hdtest01_top/u8_arbiter_wrap/i_req
|
||||
add wave -noupdate -group arbiter /$CASE_NAME/u0_hdtest01_top/u8_arbiter_wrap/i_req_end
|
||||
add wave -noupdate -group arbiter /$CASE_NAME/u0_hdtest01_top/u8_arbiter_wrap/o_grant
|
||||
add wave -noupdate -group marm_cfg /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/u_mram_cfg/state_c
|
||||
add wave -noupdate -group marm_cfg /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/u_mram_cfg/stat_vld
|
||||
add wave -noupdate -group marm_cfg /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/u_mram_cfg/status
|
||||
add wave -noupdate -group marm_cfg /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/u_mram_cfg/init_done
|
||||
add wave -noupdate -group marm_cfg /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/u_mram_cfg/done
|
||||
add wave -noupdate -group marm_cfg /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/u_mram_cfg/block_flag
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/state_c
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/rfifo_full
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/ce_n
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/ale_0
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/ale_1
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/cle_0
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/cle_1
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/re_n_0
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/re_n_1
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/we_n_0
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/we_n_1
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/cmd_flag
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/dq_en_0
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/dq_en_1
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/dq_0
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/dq_1
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/ce_n_low
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/ce_n_high
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/rd_0
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/rd_1
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/rd_2
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_ctrl/rd_3
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/wram_re_reg
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/read_flag
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/write_flag
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/rfifo_data_out
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/dq_out_0
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/program_buf_rdata_vld
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/rfifo_we
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/program_buf_rdata
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/cnt_add_byte
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/cnt_re_n
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/cnt_we_n
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/activate
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/cmd_in
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/add_row
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/add_col
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/status
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/busy
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/stat_vld
|
||||
add wave -noupdate -group nand_phy /$CASE_NAME/u0_hdtest01_top/inst_nand_top/u_nand_phy/done
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/r_mram_area
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/ARBT_ADC_CS
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/o_arbt_req
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/o_arbt_req_end
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/i_arbt_grant
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/o_user_op_addr
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/o_user_wr_req
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/o_user_wr_data
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/i_user_wr_done
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/o_user_rd_req
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/i_user_rd_data
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/i_user_rd_done
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/r_smp_num
|
||||
add wave -noupdate -group adc_write /$CASE_NAME/u0_hdtest01_top/u10_adc_arbiter_if_adaptor/o_mram_data_volume
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/r_mram_area
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/NAND_WR_CS
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/ri_mode_code
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/r_axis
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/r_sensor
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/o_arbt_req
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/o_arbt_req_end
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/i_arbt_grant
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/o_mram_rd_addr
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/o_mram_rd_req
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/i_mram_rd_data
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/i_mram_rd_done
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/r_smp_num
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/i_mram_data_volume
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/i_if_dpram_rd_done
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/o_if_dpram_wr
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/o_if_dpram_wr_addr
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/o_if_dpram_wr_data
|
||||
add wave -noupdate -group nand_write /$CASE_NAME/u0_hdtest01_top/inst_nand_write_agent/o_if_dpram_wr_done
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/vote_state
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/buf_ready
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/buf_ping_n_or_pong
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/buf_clear
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/buf_type
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/tmr_cnt
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/page_cnt
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/buf_lo_addr
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/mram_arb_req
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/mram_arb_req_end
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/mram_arb_grant
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/mram_addr
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/mram_rd_req
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/mram_rd_data
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/mram_rd_done
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/burst_req
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/trunk_over
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/data
|
||||
add wave -noupdate -group vote /$CASE_NAME/u0_hdtest01_top/inst_data_tmr_vote/data_vld
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/SCI_CS
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/r_trunk_id_cnt
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/buf_type
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/buf_ready
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/o_buf_service_request
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/ccsds
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/i_buf_rd_active
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/i_buf_rd_cs
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/i_buf_rd_en
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/i_buf_rd_addr
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/o_buf_rd_data
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/o_buf_rd_data_vld
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/update_tm
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/update_tm_done
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/update_sci
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/update_sci_done
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/i_sci_data
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/i_sci_data_vld
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/o_sci_burst_req
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/o_sci_trunk_over
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/r_sci_addr_offset
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/r_sci_frame_cnt
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/r_dpram_wr_din_b
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/r_dpram_wr_cs_b
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/r_dpram_wr_r_wn_b
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/r_dpram_din_b
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/r_dpram_cs_b
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/r_dpram_r_wn_b
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/r_dpram_addr_b
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/chksum
|
||||
add wave -noupdate -group sci_pkg /$CASE_NAME/u0_hdtest01_top/u99_test_eng_sci_data_pkg/sensor_id
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/CS
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/o_bank_ce_n
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/o_bank_oe_n
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/o_bank_we_n
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/o_bank_addr
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/io_bank_data
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/i_user_op_addr
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/i_user_wr_req
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/i_user_wr_data
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/o_user_wr_done
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/i_user_rd_req
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/o_user_rd_data
|
||||
add wave -noupdate -group mram_driver /$CASE_NAME/u0_hdtest01_top/u9_mram_driver/o_user_rd_done
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/DIST_CS
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/i_1553_int_n
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/i_buf_service_request
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/w_buf_service_request
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/vector_word
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/o_user_msg_mem_reg_n
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/r_1553_int_n_neg
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/o_user_msg_op_addr
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/o_user_msg_wr_req
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/o_user_msg_wr_data
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/i_user_msg_wr_done
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/o_user_msg_rd_req
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/i_user_msg_rd_data
|
||||
add wave -noupdate -expand -group msg_dist /$CASE_NAME/u0_hdtest01_top/u1_bu65170_driver_top/u05_bu65170_msg_dist/i_user_msg_rd_done
|
||||
eval TreeUpdate \[SetDefaultTree\]
|
||||
WaveRestoreCursors {{Cursor 1} {703840517004 ps} 0}
|
||||
quietly wave cursor active 1
|
||||
configure wave -namecolwidth 248
|
||||
configure wave -valuecolwidth 100
|
||||
configure wave -justifyvalue left
|
||||
configure wave -signalnamewidth 1
|
||||
configure wave -snapdistance 10
|
||||
configure wave -datasetprefix 0
|
||||
configure wave -rowmargin 4
|
||||
configure wave -childrowmargin 2
|
||||
configure wave -gridoffset 0
|
||||
configure wave -gridperiod 1
|
||||
configure wave -griddelta 40
|
||||
configure wave -timeline 0
|
||||
configure wave -timelineunits ns
|
||||
update
|
||||
WaveRestoreZoom {0 ps} {1575 ms}
|
||||
|
||||
if { [info exists unset_CASE_NAME] && [string equal -nocase true $unset_CASE_NAME] } {
|
||||
set unset_CASE_NAME false
|
||||
unset CASE_NAME
|
||||
}
|
||||
|
||||
BIN
new_project_rtl_template/sim/func001/merged.ucdb
Normal file
BIN
new_project_rtl_template/sim/func001/merged.ucdb
Normal file
Binary file not shown.
2037
new_project_rtl_template/sim/func001/modelsim.ini
Normal file
2037
new_project_rtl_template/sim/func001/modelsim.ini
Normal file
File diff suppressed because it is too large
Load Diff
227
new_project_rtl_template/sim/func001/run.tcl
Normal file
227
new_project_rtl_template/sim/func001/run.tcl
Normal file
@@ -0,0 +1,227 @@
|
||||
#quit -sim
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#unbound the the "work" lib dir from vsim,to remove it
|
||||
|
||||
#when error do not save wave list
|
||||
if {![string compare [runStatus] "ready" ] || ![string compare [runStatus] "break" ]} {
|
||||
source savewave.tcl
|
||||
}
|
||||
#catch {q -sim} res
|
||||
#dataset close -all
|
||||
|
||||
echo on
|
||||
.main clear
|
||||
|
||||
puts "+++++++++++++++++++++++++++++++++++++++$CASE_NAME start+++++++++++++++++++++++++++++++++++++++"
|
||||
|
||||
vmap std $SIM_TOOL_PATH/std ;
|
||||
vmap ieee $SIM_TOOL_PATH/ieee ;
|
||||
|
||||
set FUNC_SOURCE_DIR ../../../01_source/01_func
|
||||
set TIMING_SOURCE_DIR ../../../01_source/02_timing
|
||||
|
||||
set source_vhdl false
|
||||
set source_verilog false
|
||||
|
||||
set LIB_OPTION ""
|
||||
set LOG_OPTION ""
|
||||
|
||||
#if {[string match -nocase {libero*} $FPGA_KIT_VER]} {
|
||||
# #-----------actel----------
|
||||
# #puts "IDE IS $FPGA_KIT_VER!"
|
||||
# foreach file [glob -nocomplain -directory $FUNC_SOURCE_DIR *.vhd] {
|
||||
# set LOG_OPTION "-vhdlvariablelogging"
|
||||
# }
|
||||
# if {[string equal -nocase vhd $TOP_FILE_LANG]} {
|
||||
# vmap ${ACTEL_FAMILY} $VHDL_LIB/${ACTEL_FAMILY};
|
||||
# } else {
|
||||
# vmap ${ACTEL_FAMILY} $VLOG_LIB/${ACTEL_FAMILY};
|
||||
# }
|
||||
# set LIB_OPTION "-L ${ACTEL_FAMILY}"
|
||||
#
|
||||
#} elseif {[string match -nocase {ise*} $FPGA_KIT_VER]} {
|
||||
# #puts "IDE IS $FPGA_KIT_VER!"
|
||||
# foreach file [glob -nocomplain -directory $FUNC_SOURCE_DIR *.vhd] {
|
||||
# set source_vhdl true
|
||||
# set LOG_OPTION "-vhdlvariablelogging"
|
||||
# }
|
||||
# foreach file [glob -nocomplain -directory $FUNC_SOURCE_DIR *.v] {
|
||||
# set source_verilog true
|
||||
# }
|
||||
# if { [string equal -nocase true $source_vhdl] } {
|
||||
# #-----------xilinx vhdl----------
|
||||
# #puts "vhdl file exist!"
|
||||
# vmap simprim $VHDL_LIB/simprim
|
||||
# vmap unisim $VHDL_LIB/unisim
|
||||
# vmap xilinxcorelib $VHDL_LIB/xilinxcorelib
|
||||
# vmap unimacro $VHDL_LIB/unimacro
|
||||
# set LIB_OPTION "-L simprim -L unisim -L xilinxcorelib -L unimacro"
|
||||
# }
|
||||
#
|
||||
# if { [string equal -nocase true $source_verilog] } {
|
||||
# #-----------xilinx verilog----------
|
||||
# #puts "verilog file exist!"
|
||||
# vmap unisims_ver $VLOG_LIB/unisims_ver
|
||||
# vmap simprims_ver $VLOG_LIB/simprims_ver
|
||||
# vmap xilinxcorelib_ver $VLOG_LIB/xilinxcorelib_ver
|
||||
# vmap unimacro_ver $VLOG_LIB/unimacro_ver
|
||||
# vmap secureip $VLOG_LIB/secureip
|
||||
# set LIB_OPTION "-L unisims_ver -L simprims_ver -L xilinxcorelib_ver -L unimacro_ver -L secureip"
|
||||
# }
|
||||
#}
|
||||
|
||||
set defs [dict create;] ;
|
||||
dict append defs CASE_NAME $CASE_NAME;
|
||||
dict append defs TOP_ENTITY $TOP_ENTITY;
|
||||
dict append defs TOP_INSTANCE $TOP_INSTANCE;
|
||||
dict append defs timing;
|
||||
dict append defs SIM_TIME $SIM_TIME ;
|
||||
|
||||
set def_string "";
|
||||
dict for {def_name def_value} $defs {
|
||||
set def_string [format "%s+define+%s=%s" $def_string $def_name $def_value;];
|
||||
}
|
||||
puts "the define string is:$def_string"
|
||||
|
||||
|
||||
#file delete -force work ;
|
||||
|
||||
vlib $WORK_LIB_DIR/${CASE_DIR};
|
||||
vmap work $WORK_LIB_DIR/${CASE_DIR};
|
||||
catch { file delete -force $WORK_LIB_DIR/${CASE_DIR}/_lock } res;
|
||||
catch {file delete -force $WORK_LIB_DIR/${CASE_DIR}/ } res;
|
||||
|
||||
#if {![info exists SIM_TYPE]} {set SIM_TYPE func}
|
||||
#if {![info exists CORNER_TYPE]} {set CORNER_TYPE 03_max}
|
||||
|
||||
#if {[info exists 1]} {
|
||||
# set SIM_TIME $1
|
||||
#} elseif {![info exists SIM_TIME]} {set SIM_TIME -all}
|
||||
|
||||
|
||||
|
||||
#by default,all cases use the same source file list
|
||||
set VLOG_SOURCE_LIST ../file_ver.f;
|
||||
set VHDL_SOURCE_LIST ../file_vhd.f;
|
||||
|
||||
#we specify individual file list for single case
|
||||
if {[file exists file_ver.f ]} {
|
||||
puts "---->using case dependent verilog file list"
|
||||
set VLOG_SOURCE_LIST file_ver.f;
|
||||
}
|
||||
|
||||
if {[file exists file_vhd.f ]} {
|
||||
puts "---->using case dependent vhdl file list"
|
||||
set VHDL_SOURCE_LIST file_vhd.f;
|
||||
}
|
||||
|
||||
if {![string equal vhd $TOP_FILE_LANG]} {
|
||||
set GLBL glbl
|
||||
}
|
||||
|
||||
if {$SIM_TYPE == "timing"} {
|
||||
|
||||
set SDF_TYPE "-sdfmax";
|
||||
set SDFCOM_TYPE "-maxdelays";
|
||||
|
||||
puts "*************************timing simulation for CORNER_TYPE= $CORNER_TYPE*************************"
|
||||
if {[string equal $CORNER_TYPE "01_min" ]} {
|
||||
set SDF_TYPE "-sdfmin";
|
||||
set SDFCOM_TYPE "-mindelays";
|
||||
puts "++++++++++ set SDF_TYPE = -sdfmin ++++++++++";
|
||||
} elseif {[string equal $CORNER_TYPE "02_type" ]} {
|
||||
set SDF_TYPE "-sdftyp";
|
||||
set SDFCOM_TYPE "-typdelays";
|
||||
puts "++++++++++ set SDF_TYPE = -sdftyp ++++++++++";
|
||||
} elseif {[string equal $CORNER_TYPE "03_max" ]} {
|
||||
set SDF_TYPE "-sdfmax";
|
||||
set SDFCOM_TYPE "-maxdelays";
|
||||
puts "++++++++++ set SDF_TYPE = -sdfmax ++++++++++";
|
||||
}
|
||||
|
||||
if {[string match -nocase "libero*" $FPGA_KIT_VER]} {
|
||||
puts "++++++++++ develop kit is libero ++++++++++";
|
||||
} else {
|
||||
puts "++++++++++ develop kit is not libero ++++++++++";
|
||||
set TIMING_SOURCE_DIR ${TIMING_SOURCE_DIR}/${CORNER_TYPE}
|
||||
}
|
||||
|
||||
sdfcom $SDFCOM_TYPE $TIMING_SOURCE_DIR/${TOP_ENTITY}.sdf $TIMING_SOURCE_DIR/${TOP_ENTITY}.sdfcom
|
||||
|
||||
#in timing simulation ,here only glbl may be compiled seperately
|
||||
if {[file exists ${VLOG_SOURCE_LIST}]} {
|
||||
vlog -incr -quiet -sv +cover=${COVERAGE_OPTION} +incdir+../ -work work -f ${VLOG_SOURCE_LIST} $def_string
|
||||
}
|
||||
|
||||
vlog -quiet +cover=${COVERAGE_OPTION} -work work ${TIMING_SOURCE_DIR}/*.v
|
||||
|
||||
vlog -quiet -sv +cover=${COVERAGE_OPTION} -work work tb.sv $def_string
|
||||
|
||||
eval vopt ${GLBL} ${CASE_NAME} +acc=npr ${LIB_OPTION} -o ${CASE_NAME}_opt \
|
||||
+initmem+0 +initreg+0 +initwire+0;
|
||||
|
||||
|
||||
eval vsim -batch -quiet ${LIB_OPTION} -t 100ps -wlfopt -wlfcompress -nostdout \
|
||||
+no_notifier +no_tchk_msg\
|
||||
work.${CASE_NAME}_opt -wlf ${WAVE_OUTPUT_DIR}/${CASE_NAME}_timing.wlf +notimingchecks \
|
||||
${SDF_TYPE} ${CASE_NAME}/${TOP_INSTANCE}=${TIMING_SOURCE_DIR}/${TOP_ENTITY}.sdfcom;
|
||||
|
||||
do ../suppresswarning.tcl
|
||||
|
||||
|
||||
catch {run ${SIM_TIME} } res
|
||||
} else {
|
||||
|
||||
|
||||
#compile source files
|
||||
if {[file exists ${VLOG_SOURCE_LIST}]} {
|
||||
puts "---->compile verilog source files ,testbench and models using $VLOG_SOURCE_LIST........"
|
||||
# vlog -incr -quiet +cover=${COVERAGE_OPTION} +incdir+../ -work work -f ${VLOG_SOURCE_LIST} $def_string -suppress 12003
|
||||
vlog -sv -vmake -quiet +cover=${COVERAGE_OPTION} +incdir+../ -work work -f ${VLOG_SOURCE_LIST} $def_string -suppress 12003
|
||||
}
|
||||
|
||||
|
||||
if {[file exists ${VHDL_SOURCE_LIST}]} {
|
||||
puts "---->compile vhdl files using $VHDL_SOURCE_LIST........"
|
||||
vcom -vmake -nocoverudp -2008 -explicit -quiet +cover=${COVERAGE_OPTION} -work work -f ${VHDL_SOURCE_LIST}
|
||||
}
|
||||
|
||||
# eval vopt ${GLBL} ${CASE_NAME} +acc -o ${CASE_NAME}_opt ${LIB_OPTION} \
|
||||
# +cover=bcsf+/${CASE_NAME}/${TOP_INSTANCE} -nocoverudp -nocovercells \
|
||||
# +initmem+0 +initreg+0 +initwire+0 \
|
||||
# -suppress 2912 \
|
||||
# -suppress 1127
|
||||
|
||||
#to mask 211 error
|
||||
catch {
|
||||
if { [string compare [runStatus] "ready" ] && [string compare [runStatus] "break" ]} {
|
||||
eval vsim ${LOG_OPTION} -batch -quiet -coverage -voptargs="+acc=npr" ${LIB_OPTION} \
|
||||
-t 1ps -wlfopt -wlfcompress -nostdout \
|
||||
+initmem+0 +initreg+0 +initwire+0 \
|
||||
+no_notifier +no_tchk_msg -suppress 3009 -suppress 12110 \
|
||||
-classdebug \
|
||||
glbl work.${CASE_NAME} \
|
||||
-wlf ${WAVE_OUTPUT_DIR}/${CASE_DIR}_timeing.wlf
|
||||
} else {
|
||||
restart -f
|
||||
}
|
||||
} res;
|
||||
|
||||
do ../suppresswarning.tcl
|
||||
|
||||
catch {do wave.tcl} res
|
||||
|
||||
set TEMP_REF_FILES info.txt;
|
||||
write report -l $TEMP_REF_FILES
|
||||
|
||||
catch {run ${SIM_TIME} } res
|
||||
|
||||
do ../saveucdb.tcl
|
||||
#}
|
||||
|
||||
set current_path [pwd]
|
||||
puts "+++++++++++++++++++++++++++current path=$current_path++++++++++++++++++++++++++++++++"
|
||||
20
new_project_rtl_template/sim/func001/runone.tcl
Normal file
20
new_project_rtl_template/sim/func001/runone.tcl
Normal file
@@ -0,0 +1,20 @@
|
||||
quit -sim
|
||||
cd ..
|
||||
|
||||
#clear the simulator transcript window and make the wave,data & coverage director
|
||||
.main clear
|
||||
|
||||
set wrap_args [list];
|
||||
#put the do command $1-$9 to list,because we can't use the argv,we should construct the "argv" mannully.
|
||||
for {set i 1} {$i <= $argc} {incr i 1} {
|
||||
lappend wrap_args [set $i];
|
||||
}
|
||||
|
||||
#echo $args
|
||||
|
||||
eval do runone.tcl $wrap_args
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
7
new_project_rtl_template/sim/func001/save.tcl
Normal file
7
new_project_rtl_template/sim/func001/save.tcl
Normal file
@@ -0,0 +1,7 @@
|
||||
if {$argc>=1} {
|
||||
catch {write format wave -window Wave $1.tcl} res
|
||||
} else {
|
||||
catch {write format wave -window Wave case.tcl} res
|
||||
}
|
||||
|
||||
|
||||
114
new_project_rtl_template/sim/func001/savewave.tcl
Normal file
114
new_project_rtl_template/sim/func001/savewave.tcl
Normal file
@@ -0,0 +1,114 @@
|
||||
# When open .wlf file, there is no CASE_NAME variable in context. We get the case name by searching in the struct window instead.
|
||||
if {true} {
|
||||
# raw script code in pre_format
|
||||
set pre_format {
|
||||
# When open .wlf file, there is no CASE_NAME variable in context. We get the case name by searching in the struct window instead.
|
||||
if {![info exists CASE_NAME]} {
|
||||
puts "++++++++++ search case name ++++++++++"
|
||||
set wave_sim_type func
|
||||
for {set wave_i 0} {$wave_i < 1000} {incr wave_i 1} {
|
||||
set wave_case_num [format "%03d" $wave_i];
|
||||
set wave_case_name ${wave_sim_type}${wave_case_num}
|
||||
if {[search structure $wave_case_name] >= 0} {
|
||||
break
|
||||
}
|
||||
}
|
||||
set unset_CASE_NAME true
|
||||
set CASE_NAME $wave_case_name
|
||||
}
|
||||
}
|
||||
}; list
|
||||
# from stackoverflow.com "how to keep commands quiet in TCL?"
|
||||
# if you want to inhibit such printouts in an interactive session(comes in handy from time to time), a simple hack to achieve that is to chain the command
|
||||
# you want to "silence" with a "silent" command(producing a value whose string representation is an empty string).
|
||||
# for instance: set a [open "giri.txt" r]; list
|
||||
|
||||
if {true} {
|
||||
# raw script code in post_format
|
||||
set post_format {
|
||||
if { [info exists unset_CASE_NAME] && [string equal -nocase true $unset_CASE_NAME] } {
|
||||
set unset_CASE_NAME false
|
||||
unset CASE_NAME
|
||||
}
|
||||
}
|
||||
}; list
|
||||
|
||||
# support save format when only open .wlf instead of run a case
|
||||
# When open .wlf file, there is no CASE_NAME variable in context. We get the case name by searching in the struct window instead.
|
||||
if {![info exists CASE_NAME]} {
|
||||
puts "++++++++++ search case name ++++++++++"
|
||||
set wave_sim_type func
|
||||
for {set wave_i 0} {$wave_i < 1000} {incr wave_i 1} {
|
||||
set wave_case_num [format "%03d" $wave_i];
|
||||
set wave_case_name ${wave_sim_type}${wave_case_num}
|
||||
if {[search structure $wave_case_name] >= 0} {
|
||||
break
|
||||
}
|
||||
}
|
||||
set unset_CASE_NAME true
|
||||
set CASE_NAME $wave_case_name
|
||||
}
|
||||
|
||||
# brace all to eliminate unnecessary output(example. "set fd_pre_savewave [open pre_savewave.tcl r]" will display returned value of set cmd)
|
||||
if {true} {
|
||||
# save current wave format to a tmp file
|
||||
catch {write format wave -window Wave intermediate_wave_format_file.tmp} res
|
||||
|
||||
if {$argc>=1} { # example: do savewave.tcl wave_name
|
||||
set wave_name $1
|
||||
if {[regexp {^([-\w\+]+\.)+[-\w\+]*$} $wave_name] >= 1} {
|
||||
# replace the last postfix(.tcl or .do or .) with null, i.e. delete the last postfix(including .)
|
||||
while {[regexp -nocase {(\.(tcl|do)*$)} $wave_name] >= 1} {
|
||||
regsub {(\.[-\w\+]*$)} $wave_name {} wave_name
|
||||
}
|
||||
} elseif {[regexp {^[-\w\+]+$} $wave_name] >= 1} {
|
||||
# nop
|
||||
} else {
|
||||
echo "Invalid file name $wave_name!"
|
||||
return
|
||||
}
|
||||
set fd_wave [open $wave_name.tcl w]
|
||||
echo "Wave format saved to $wave_name.tcl"
|
||||
} else { # example: do savewave.tcl
|
||||
set fd_wave [open wave1.tcl w]
|
||||
echo "Wave format saved to wave1.tcl"
|
||||
}
|
||||
|
||||
set fd_intermediate_wave_format_file [open intermediate_wave_format_file.tmp r]
|
||||
|
||||
# put lines in pre_format to final file(the file specified in argument $1)
|
||||
set lines [split $pre_format "\n"]
|
||||
set total_lines [llength $lines]
|
||||
for {set line_idx 0} {$line_idx < $total_lines} {incr line_idx 1} {
|
||||
set wave_format_line [lindex $lines $line_idx]
|
||||
chan puts $fd_wave $wave_format_line
|
||||
}
|
||||
|
||||
# put lines in tmp file to final file(the file specified in argument $1)
|
||||
while {[chan gets $fd_intermediate_wave_format_file wave_format_line] >= 0} {
|
||||
if {[regexp -all {\[|\]} $wave_format_line] >= 1} {
|
||||
# if [ and ] exist in line(like [10:0] or [2]), then escape them, i.e. \[ and \]
|
||||
regsub -all {\[|\]} $wave_format_line {\\&} wave_format_line
|
||||
# and then add eval in the biginning
|
||||
regsub (^) $wave_format_line {eval } wave_format_line
|
||||
}
|
||||
# make virtual signal ok
|
||||
if {[regexp -all {virtual signal} $wave_format_line] >= 1} {
|
||||
regsub -all {\{} $wave_format_line {[subst &} wave_format_line
|
||||
regsub -all {\}} $wave_format_line {&]} wave_format_line
|
||||
}
|
||||
regsub -all $CASE_NAME $wave_format_line {$CASE_NAME} wave_format_line
|
||||
chan puts $fd_wave $wave_format_line
|
||||
}
|
||||
|
||||
# put lines in post_format to final file(the file specified in argument $1)
|
||||
set lines [split $post_format "\n"]
|
||||
set total_lines [llength $lines]
|
||||
for {set line_idx 0} {$line_idx < $total_lines} {incr line_idx 1} {
|
||||
set wave_format_line [lindex $lines $line_idx]
|
||||
chan puts $fd_wave $wave_format_line
|
||||
}
|
||||
|
||||
close $fd_wave
|
||||
close $fd_intermediate_wave_format_file
|
||||
}
|
||||
235
new_project_rtl_template/sim/func001/tb.sv
Normal file
235
new_project_rtl_template/sim/func001/tb.sv
Normal file
@@ -0,0 +1,235 @@
|
||||
`timescale 1ns/1ps
|
||||
|
||||
module
|
||||
`CASE_NAME();
|
||||
`include "../instantiate_top.sv"
|
||||
|
||||
final mti_fli::mti_Cmd("do ../saveucdb.tcl");
|
||||
|
||||
initial begin
|
||||
$fsdbDumpfile("fsdb_wave.fsdb");
|
||||
$fsdbDumpvars;
|
||||
end
|
||||
|
||||
/*>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>simulation time control>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
|
||||
/*to end the simulation commandary*/
|
||||
/*if you want to end the simulation case by case,just comment the line
|
||||
/*<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<simulation time control<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
|
||||
//TODO:
|
||||
|
||||
logic apb_uart_irq;
|
||||
logic apb_uart_rda; // rx data avaiable
|
||||
logic apb_uart_tde; // tx data empty
|
||||
|
||||
logic apb_uart_req;
|
||||
logic apb_uart_write;
|
||||
logic [16-1:0] apb_uart_addr;
|
||||
logic [32-1:0] apb_uart_wdata;
|
||||
logic [32-1:0] apb_uart_rdata;
|
||||
logic apb_uart_ready;
|
||||
|
||||
logic [16-1:0] apb_uart_paddr;
|
||||
logic apb_uart_psel;
|
||||
logic apb_uart_penable;
|
||||
logic apb_uart_pwrite;
|
||||
logic [32-1:0] apb_uart_pwdata;
|
||||
|
||||
logic [32-1:0] apb_uart_prdata;
|
||||
logic apb_uart_pready;
|
||||
|
||||
// instance vip
|
||||
vip_clock # (.FREQUENCY_MHZ(50)) u0_clock(.duty_percent(50), .jitter_percent(0), .clk(clk));
|
||||
|
||||
apb_uart_top tb_apb_uart_top(
|
||||
.CLK (clk),
|
||||
.RSTN (rstn),
|
||||
/* verilator lint_off UNUSED */
|
||||
.PADDR (apb_uart_paddr),
|
||||
/* lint_on */
|
||||
.PWDATA (apb_uart_pwdata),
|
||||
.PWRITE (apb_uart_pwrite),
|
||||
.PSEL (apb_uart_psel),
|
||||
.PENABLE (apb_uart_penable),
|
||||
.PRDATA (apb_uart_prdata),
|
||||
.PREADY (apb_uart_pready),
|
||||
.PSLVERR (),
|
||||
|
||||
.rx_i (uart_tx), // Receiver input
|
||||
.tx_o (uart_rx), // Transmitter output
|
||||
|
||||
.rda_o (apb_uart_rda), // rx data avaiable
|
||||
.tde_o (apb_uart_tde), // tx data empty
|
||||
.event_o (apb_uart_irq) // interrupt/event output
|
||||
);
|
||||
|
||||
apbmif tb_apb_uart_apbmif(
|
||||
.req (apb_uart_req),
|
||||
.write (apb_uart_write),
|
||||
.addr (apb_uart_addr),
|
||||
.wdata (apb_uart_wdata),
|
||||
.rdata (apb_uart_rdata),
|
||||
.ready (apb_uart_ready),
|
||||
// APB interface
|
||||
.PRESETn (rstn),
|
||||
.PCLK (clk),
|
||||
// APB master
|
||||
.PADDR (apb_uart_paddr),
|
||||
.PSEL (apb_uart_psel),
|
||||
.PENABLE (apb_uart_penable),
|
||||
.PWRITE (apb_uart_pwrite),
|
||||
.PSTRB (),
|
||||
.PWDATA (apb_uart_pwdata),
|
||||
|
||||
.PRDATA (apb_uart_prdata),
|
||||
.PREADY (apb_uart_pready)
|
||||
);
|
||||
|
||||
logic [4:0] ehex;
|
||||
logic ehex_valid;
|
||||
|
||||
logic cli_poll;
|
||||
logic echo_push;
|
||||
|
||||
logic run_priority ;
|
||||
logic cli_poll_pending ;
|
||||
logic echo_push_pending;
|
||||
|
||||
logic apb_uart_ready_d1;
|
||||
logic apb_uart_read_done;
|
||||
logic apb_uart_write_done;
|
||||
logic apb_uart_is_reading;
|
||||
|
||||
always_ff @(posedge clk or negedge rstn) begin
|
||||
if (!rstn) begin
|
||||
apb_uart_ready_d1 <= 1'b1;
|
||||
end else begin
|
||||
apb_uart_ready_d1 <= apb_uart_ready;
|
||||
end
|
||||
end
|
||||
|
||||
assign apb_uart_read_done = apb_uart_is_reading && apb_uart_ready && !apb_uart_ready_d1;
|
||||
assign apb_uart_write_done = !apb_uart_is_reading && apb_uart_ready && !apb_uart_ready_d1;
|
||||
|
||||
always_ff @(posedge clk or negedge rstn) begin
|
||||
if (!rstn) begin
|
||||
apb_uart_req <= 0;
|
||||
apb_uart_write <= 0;
|
||||
apb_uart_addr <= 0;
|
||||
run_priority <= 0; // 0: read; 1: write;
|
||||
cli_poll_pending <= 0;
|
||||
echo_push_pending <= 0;
|
||||
apb_uart_is_reading <= 0;
|
||||
end else begin
|
||||
if (cli_poll)
|
||||
cli_poll_pending <= 1'b1;
|
||||
if (echo_push)
|
||||
echo_push_pending <= 1'b1;
|
||||
|
||||
apb_uart_req <= 0;
|
||||
apb_uart_write <= 0;
|
||||
|
||||
if (apb_uart_ready) begin
|
||||
if (cli_poll_pending && !echo_push_pending) begin // read
|
||||
cli_poll_pending <= 1'b0;
|
||||
run_priority <= 1'b1; // next time write first
|
||||
apb_uart_req <= 1'b1;
|
||||
apb_uart_write <= 1'b0;
|
||||
apb_uart_addr <= 0;
|
||||
apb_uart_is_reading <= 1'b1;
|
||||
end else if (!cli_poll_pending && echo_push_pending) begin // write
|
||||
echo_push_pending <= 1'b0;
|
||||
run_priority <= 1'b0; // next time read first
|
||||
apb_uart_req <= 1'b1;
|
||||
apb_uart_write <= 1'b1;
|
||||
apb_uart_addr <= 0;
|
||||
apb_uart_is_reading <= 0;
|
||||
end else if (cli_poll_pending && echo_push_pending) begin
|
||||
if (run_priority) begin // write
|
||||
echo_push_pending <= 1'b0;
|
||||
run_priority <= 1'b0; // next time read first
|
||||
apb_uart_req <= 1'b1;
|
||||
apb_uart_write <= 1'b1;
|
||||
apb_uart_addr <= 0;
|
||||
apb_uart_is_reading <= 0;
|
||||
end else begin // read
|
||||
cli_poll_pending <= 1'b0;
|
||||
run_priority <= 1'b1; // next time write first
|
||||
apb_uart_req <= 1'b1;
|
||||
apb_uart_write <= 1'b0;
|
||||
apb_uart_addr <= 0;
|
||||
apb_uart_is_reading <= 1'b1;
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
initial begin
|
||||
rstn = 0;
|
||||
#1us rstn = 1;
|
||||
end
|
||||
|
||||
initial begin
|
||||
int uart_recv = $fopen("uart_recv.log");
|
||||
cli_poll = 0;
|
||||
#1ns;
|
||||
@(posedge rstn);
|
||||
forever begin
|
||||
wait (apb_uart_rda == 1'b1);
|
||||
@(posedge clk);
|
||||
fork
|
||||
cli_poll = 1'b1;
|
||||
@(posedge clk) cli_poll = 1'b0;
|
||||
join_none
|
||||
@(posedge apb_uart_read_done) $fwrite(uart_recv, "%s", apb_uart_rdata[7:0]);
|
||||
@(negedge apb_uart_rda);
|
||||
end
|
||||
end
|
||||
|
||||
task send_cmd(input string cmd);
|
||||
begin
|
||||
foreach(cmd[i]) begin
|
||||
wait (apb_uart_tde == 1'b1);
|
||||
@(posedge clk);
|
||||
echo_push = 1'b1;
|
||||
apb_uart_wdata = cmd[i];
|
||||
@(posedge clk) echo_push = 1'b0;
|
||||
@(negedge apb_uart_tde);
|
||||
end
|
||||
end
|
||||
endtask
|
||||
|
||||
initial begin
|
||||
echo_push = 0;
|
||||
#1ns;
|
||||
@(posedge rstn);
|
||||
#1ms;
|
||||
send_cmd("\x03");
|
||||
#5ms;
|
||||
send_cmd("\x03");
|
||||
#5ms;
|
||||
send_cmd("\n");
|
||||
#1ms;
|
||||
send_cmd("w");
|
||||
#1ms;
|
||||
send_cmd("\n");
|
||||
send_cmd("w 0 beef1111 beef2222 beef3333 beef4444\n");
|
||||
send_cmd("w 10 beef5555 beef6666 beef7777 beef8888\n");
|
||||
send_cmd("r 0 -s 8 -t a\n");
|
||||
#25ms;
|
||||
send_cmd("\x03");
|
||||
#5ms;
|
||||
send_cmd("\x03");
|
||||
#5ms;
|
||||
send_cmd("\x03");
|
||||
#5ms;
|
||||
send_cmd("r 0 -s 2\n");
|
||||
#5ms;
|
||||
send_cmd("r 8 -s 2\n");
|
||||
#5ms;
|
||||
send_cmd("r 10 -s\n");
|
||||
#5ms;
|
||||
send_cmd("r 10 -s -s\n");
|
||||
end
|
||||
|
||||
endmodule
|
||||
29
new_project_rtl_template/sim/func001/vip_clock.sv
Normal file
29
new_project_rtl_template/sim/func001/vip_clock.sv
Normal file
@@ -0,0 +1,29 @@
|
||||
module vip_clock
|
||||
#(
|
||||
parameter FREQUENCY_MHZ = 1,
|
||||
parameter PHASE_DEGREE = 0
|
||||
)
|
||||
(
|
||||
input int duty_percent = 50,//dynamical parameter
|
||||
input int jitter_percent = 0,//dynamical parameter
|
||||
output clk
|
||||
);
|
||||
|
||||
|
||||
|
||||
logic ideal_clk;
|
||||
|
||||
initial begin
|
||||
ideal_clk = 0;
|
||||
#(1.0e3/FREQUENCY_MHZ/360.0*PHASE_DEGREE * 1ns);
|
||||
forever begin
|
||||
ideal_clk = 0;
|
||||
#(1.0e3/FREQUENCY_MHZ*(1-duty_percent/100.0)* 1ns);
|
||||
|
||||
ideal_clk = 1;
|
||||
#(1.0e3/FREQUENCY_MHZ*duty_percent/100.0 * 1ns);
|
||||
end
|
||||
end
|
||||
|
||||
assign # (1.0e3/FREQUENCY_MHZ*jitter_percent/100.0*1ns) clk = ideal_clk;
|
||||
endmodule
|
||||
75
new_project_rtl_template/sim/func001/wave.tcl
Normal file
75
new_project_rtl_template/sim/func001/wave.tcl
Normal file
@@ -0,0 +1,75 @@
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
#ATTTION : MODIFY THIS FILE AS YOU WANT
|
||||
|
||||
#preset envieroment variables
|
||||
if {[info exists SIM_TYPE] && $SIM_TYPE == "timing"} {
|
||||
|
||||
} else {
|
||||
|
||||
puts "---->checing the simulator status to decide whether to restore the wave session.................."
|
||||
puts "---->the runstatus is :[runStatus]"
|
||||
#if {![string compare [runStatus] "ready" ] || ![string compare [runStatus] "error" ]} {
|
||||
puts "---->trying restore to saved wave window.................."
|
||||
|
||||
catch {
|
||||
set size [file size lastwave.tcl];
|
||||
#check if size is too much
|
||||
if($size > (10*1024){
|
||||
puts "lastwave.tcl size is $size,try to recover"
|
||||
do lastwave.tcl
|
||||
}
|
||||
} res;
|
||||
#}
|
||||
|
||||
|
||||
# catch {log -mvcreccomplete -r -depth 6 /* } res
|
||||
|
||||
catch {log -mvcreccomplete -r -depth 6 /$CASE_NAME/*} res
|
||||
catch {log -mvcreccomplete -r -depth 6 /$CASE_NAME/$TOP_INSTANCE/*} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/CENTRAL_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/TIME_TICK_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/IMGRX_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/IMGRX_inst/TRAIN_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/IMGRX_inst/SEQUENCER_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/IMGRX_inst/GENIMGVAL_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/IMGRXDATA_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/SDRAM_TOP_instHigh} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/SDRAM_TOP_instHigh/SDRAM_AREF_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/SDRAM_TOP_instHigh/SDRAM_INIT_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/SDRAM_TOP_instHigh/SDRAM_READ_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/SDRAM_TOP_instHigh/SDRAM_WRITE_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/SDRAM_TOP_instLow} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/SDRAM_FRMRDCTRL_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/IMGTX_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/IMGSPI_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/COMMANDHANDLER_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/ERUPRAMCAL_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/ERUPSUM_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/FRMHEADWR_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/GUIDEPIEZORX_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/STATE_RETURN_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/TEMP461_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/TIME_TICK_inst} res
|
||||
# catch {log -mvcreccomplete -r -depth 4 /$CASE_NAME/$TOP_INSTANCE/TIMEPRO_inst} res
|
||||
|
||||
|
||||
|
||||
# log -class pkg_uart::uart
|
||||
# catch {class/pkg_uart::uart::uart__2} res;
|
||||
}
|
||||
142
new_project_rtl_template/sim/func001/wave1.tcl
Normal file
142
new_project_rtl_template/sim/func001/wave1.tcl
Normal file
@@ -0,0 +1,142 @@
|
||||
|
||||
# When open .wlf file, there is no CASE_NAME variable in context. We get the case name by searching in the struct window instead.
|
||||
if {![info exists CASE_NAME]} {
|
||||
puts "++++++++++ search case name ++++++++++"
|
||||
set wave_sim_type func
|
||||
for {set wave_i 0} {$wave_i < 1000} {incr wave_i 1} {
|
||||
set wave_case_num [format "%03d" $wave_i];
|
||||
set wave_case_name ${wave_sim_type}${wave_case_num}
|
||||
if {[search structure $wave_case_name] >= 0} {
|
||||
break
|
||||
}
|
||||
}
|
||||
set unset_CASE_NAME true
|
||||
set CASE_NAME $wave_case_name
|
||||
}
|
||||
|
||||
onerror {resume}
|
||||
quietly WaveActivateNextPane {} 0
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/CLK
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/RSTN
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/PADDR
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/PWDATA
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/PWRITE
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/PSEL
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/PENABLE
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/PRDATA
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/PREADY
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/PSLVERR
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/rx_i
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/tx_o
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/rda_o
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/tde_o
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/event_o
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/register_adr
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/regs_q
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/regs_n
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/trigger_level_n
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/trigger_level_q
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/rx_data
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/parity_error
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/rx_overrun
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/IIR_o
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/clr_int
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/tx_ready
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/apb_rx_ready
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/rx_valid
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/tx_fifo_clr_n
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/tx_fifo_clr_q
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/rx_fifo_clr_n
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/rx_fifo_clr_q
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/fifo_tx_valid
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/tx_valid
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/fifo_rx_valid
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/fifo_rx_data
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/fifo_rx_ready
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/rx_ready
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/fifo_tx_data
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/tx_data
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/tx_elements
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/rx_elements
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/req
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/write
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/addr
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/wdata
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/rdata
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/ready
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/PRESETn
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/PCLK
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/PADDR
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/PSEL
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/PENABLE
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/PWRITE
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/PSTRB
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/PWDATA
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/PRDATA
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/PREADY
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_apbmif/STATE
|
||||
add wave -noupdate /$CASE_NAME/uart_read_done
|
||||
add wave -noupdate /$CASE_NAME/uart_rdata
|
||||
add wave -noupdate /$CASE_NAME/uart_ready
|
||||
add wave -noupdate /$CASE_NAME/uart_ready_d1
|
||||
add wave -noupdate /$CASE_NAME/uart_is_reading
|
||||
add wave -noupdate /$CASE_NAME/cli_poll
|
||||
add wave -noupdate /$CASE_NAME/uart_rda
|
||||
add wave -noupdate /$CASE_NAME/echo_push
|
||||
add wave -noupdate /$CASE_NAME/uart_tde
|
||||
add wave -noupdate /$CASE_NAME/uart_wdata
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cli_state
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_state
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/exec_state
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/ehex
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/ehex_valid
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_rda
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_rdata
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_req
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_ready
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_read_done
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_is_reading
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/op_code
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/op_addr_valid
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/rcnt
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/read_size_latch
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/timer_en
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_data_done
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/tx_data
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/tx_valid
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/fifo_tx_data
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_apb_uart/fifo_tx_valid
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_wdata
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_write
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_push
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_push_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cli_poll
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cli_poll_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_char
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/hex2char_req
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/apb_rdata
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/char_cnt
|
||||
eval TreeUpdate \[SetDefaultTree\]
|
||||
WaveRestoreCursors {{Cursor 1} {1606410000 ps} 0}
|
||||
quietly wave cursor active 1
|
||||
configure wave -namecolwidth 427
|
||||
configure wave -valuecolwidth 142
|
||||
configure wave -justifyvalue left
|
||||
configure wave -signalnamewidth 0
|
||||
configure wave -snapdistance 10
|
||||
configure wave -datasetprefix 0
|
||||
configure wave -rowmargin 4
|
||||
configure wave -childrowmargin 2
|
||||
configure wave -gridoffset 0
|
||||
configure wave -gridperiod 1
|
||||
configure wave -griddelta 40
|
||||
configure wave -timeline 0
|
||||
configure wave -timelineunits ps
|
||||
update
|
||||
WaveRestoreZoom {950499888 ps} {2263000112 ps}
|
||||
|
||||
if { [info exists unset_CASE_NAME] && [string equal -nocase true $unset_CASE_NAME] } {
|
||||
set unset_CASE_NAME false
|
||||
unset CASE_NAME
|
||||
}
|
||||
|
||||
104
new_project_rtl_template/sim/func001/wave2.tcl
Normal file
104
new_project_rtl_template/sim/func001/wave2.tcl
Normal file
@@ -0,0 +1,104 @@
|
||||
|
||||
# When open .wlf file, there is no CASE_NAME variable in context. We get the case name by searching in the struct window instead.
|
||||
if {![info exists CASE_NAME]} {
|
||||
puts "++++++++++ search case name ++++++++++"
|
||||
set wave_sim_type func
|
||||
for {set wave_i 0} {$wave_i < 1000} {incr wave_i 1} {
|
||||
set wave_case_num [format "%03d" $wave_i];
|
||||
set wave_case_name ${wave_sim_type}${wave_case_num}
|
||||
if {[search structure $wave_case_name] >= 0} {
|
||||
break
|
||||
}
|
||||
}
|
||||
set unset_CASE_NAME true
|
||||
set CASE_NAME $wave_case_name
|
||||
}
|
||||
|
||||
onerror {resume}
|
||||
quietly WaveActivateNextPane {} 0
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cli_state
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_state
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/exec_state
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_tx
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/uart_rx
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/read_period
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/read_period_latch
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cmd_abort_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cmd_enter_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cmd_err_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cmd_read_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cmd_write_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_ctrlc_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_prompt_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_mem_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/timeout
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/timer_en
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/hex2char_req
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_push
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_done
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_char
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/apb_rdata
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_data_latch
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_buf
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cli_poll
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cli_poll_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_push_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_is_reading
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_read_done
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_write_done
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/strlen
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/char_cnt
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_req
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_write
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_wdata
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_rdata
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_ready
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/uart_rda
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/word_cnt
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u0_module/u_regfile/data0
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u0_module/u_regfile/data1
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u0_module/u_regfile/data2
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u0_module/u_regfile/data3
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u0_module/u_regfile/data4
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u0_module/u_regfile/data5
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u0_module/u_regfile/data6
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u0_module/u_regfile/data7
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/rcnt
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/wcnt
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/ehex_valid
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/ehex
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/option_s_valid
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/read_size
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/read_size_latch
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/op_addr
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/op_addr_latch
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/apb_req
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/apb_wdata
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/apb_write
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u0_module/u_regfile/addr
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/apb_addr
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/led
|
||||
eval TreeUpdate \[SetDefaultTree\]
|
||||
WaveRestoreCursors {{Cursor 1} {44875450000 ps} 0}
|
||||
quietly wave cursor active 1
|
||||
configure wave -namecolwidth 429
|
||||
configure wave -valuecolwidth 100
|
||||
configure wave -justifyvalue left
|
||||
configure wave -signalnamewidth 0
|
||||
configure wave -snapdistance 10
|
||||
configure wave -datasetprefix 0
|
||||
configure wave -rowmargin 4
|
||||
configure wave -childrowmargin 2
|
||||
configure wave -gridoffset 0
|
||||
configure wave -gridperiod 1
|
||||
configure wave -griddelta 40
|
||||
configure wave -timeline 0
|
||||
configure wave -timelineunits ps
|
||||
update
|
||||
WaveRestoreZoom {44875169561 ps} {44875810439 ps}
|
||||
|
||||
if { [info exists unset_CASE_NAME] && [string equal -nocase true $unset_CASE_NAME] } {
|
||||
set unset_CASE_NAME false
|
||||
unset CASE_NAME
|
||||
}
|
||||
|
||||
66
new_project_rtl_template/sim/func001/wave3.tcl
Normal file
66
new_project_rtl_template/sim/func001/wave3.tcl
Normal file
@@ -0,0 +1,66 @@
|
||||
|
||||
# When open .wlf file, there is no CASE_NAME variable in context. We get the case name by searching in the struct window instead.
|
||||
if {![info exists CASE_NAME]} {
|
||||
puts "++++++++++ search case name ++++++++++"
|
||||
set wave_sim_type func
|
||||
for {set wave_i 0} {$wave_i < 1000} {incr wave_i 1} {
|
||||
set wave_case_num [format "%03d" $wave_i];
|
||||
set wave_case_name ${wave_sim_type}${wave_case_num}
|
||||
if {[search structure $wave_case_name] >= 0} {
|
||||
break
|
||||
}
|
||||
}
|
||||
set unset_CASE_NAME true
|
||||
set CASE_NAME $wave_case_name
|
||||
}
|
||||
|
||||
onerror {resume}
|
||||
quietly WaveActivateNextPane {} 0
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cli_state
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_state
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/exec_state
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cmd_abort_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cmd_read_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cmd_write_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_ctrlc_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_enter_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_err_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_mem_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/echo_split_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cli_push
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cli_push_pending
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cli_wdata
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/cli_write_done
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/char_cnt
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/rx_data
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/rx_ready
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/rx_valid
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/tx_data
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/tx_ready
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/tx_valid
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/errno
|
||||
add wave -noupdate /$CASE_NAME/u0_top_module/u_debug_hub/u0_debug_cli/ehex
|
||||
eval TreeUpdate \[SetDefaultTree\]
|
||||
WaveRestoreCursors {{Cursor 1} {1171070000 ps} 0}
|
||||
quietly wave cursor active 1
|
||||
configure wave -namecolwidth 469
|
||||
configure wave -valuecolwidth 99
|
||||
configure wave -justifyvalue left
|
||||
configure wave -signalnamewidth 0
|
||||
configure wave -snapdistance 10
|
||||
configure wave -datasetprefix 0
|
||||
configure wave -rowmargin 4
|
||||
configure wave -childrowmargin 2
|
||||
configure wave -gridoffset 0
|
||||
configure wave -gridperiod 1
|
||||
configure wave -griddelta 40
|
||||
configure wave -timeline 0
|
||||
configure wave -timelineunits ps
|
||||
update
|
||||
WaveRestoreZoom {1170929782 ps} {1171250218 ps}
|
||||
|
||||
if { [info exists unset_CASE_NAME] && [string equal -nocase true $unset_CASE_NAME] } {
|
||||
set unset_CASE_NAME false
|
||||
unset CASE_NAME
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user