CGA-bench/analysis/hdlbits_dead_branch_notes.md

HDLBits Dead-Branch Notes

These notes are meant to separate "CGA failed to find a reachable path" from "the remaining branch is mostly an illegal-state/default guard."

Likely dead-branch ceiling

• ece241_2013_q8

  • default: next = 'x;
  • default: z = 'x;
  • Under legal reset-driven execution, these branches are not expected to fire.

• m2014_q6

  • default: next = 'x;
  • Remaining uncovered logic is likely dominated by the illegal-state guard.

• review2015_fsm

  • default: next = States'(4'bx);
  • if (|state === 1'bx) output guard
  • These are defensive X-state branches rather than normal protocol behavior.

Likely reachable but hard

• 2014_q3fsm
  • Coverage is below 100%, but the named FSM states are all part of the legal state graph.
  • Treat this as a "reachable but not hit consistently" task, not a pure dead-branch ceiling case.

Use in the paper

• For aggregate structural coverage analysis, keep these tasks in the dataset.
• In discussion, explicitly label the first group as dead_branch ceiling.
• Do not claim that failure on these tasks implies CGA cannot explore normal protocol logic.