---------------custom config-------------- run: mode: autoline save: en: True pub: prefix: MyProjectCleanI2C subdir: MyExperimentsClean gpt: model: qwen-max rtlgen_model: qwen-max autoline: result_path: results/myproject_clean_i2c cga: enabled: True max_iter: 15 target_coverage: 100.0 probset: path: data/myproject/i2c_controller_clean.jsonl mutant_path: None more_info_paths: [] only: ['i2c_controller'] promptscript: pychecker timeout: 300 save_compile: False debug: max: 3 itermax: 10 update_desc: False TBcheck: discrim_mode: col_70_wrong_row_25_correct ------------------------------------------ ------config info (custom + default)------ run: version: 2.0 author: Ruidi Qiu - Technical University of Munich time: 20260509_141755 custom_path: config/myproject_clean_i2c.yaml mode: autoline hostname: localhost pid: 2007 pyversion: 3.12.3 (main, Mar 23 2026, 19:04:32) [GCC 13.3.0] save: en: True root: saves/0504~0510/MyExperimentsClean/MyProjectCleanI2C_20260509_141755/ pub: prefix: MyProjectCleanI2C dir: saves/0504~0510/ subdir: MyExperimentsClean/ log: en: True dir: logs/ notes: None cfg_pmode: iwantall debug_en: False level: TRACE message: en: True dir: messages/ format: json iverilog: en: True subdir: ivcode_nodebug load: prompt: path: config/initial_prompts/prompt1.txt pick_idx: [] stage_template: path: config/templates/stage_template0301.txt gpt: model: qwen-max key_path: config/key_API.json temperature: None json_mode: False chatgpt: start_form: chat one_time_talk: False rtlgen_model: qwen-max iverilog: dir: task_id: autoline: result_path: results/myproject_clean_i2c cga: enabled: True max_iter: 15 target_coverage: 100.0 probset: path: data/myproject/i2c_controller_clean.jsonl mutant_path: None gptgenRTL_path: None more_info_paths: [] only: ['i2c_controller'] exclude: [] exclude_json: None filter: [{}] checklist: max: 3 debug: max: 3 reboot: 1 py_rollback: 2 onlyrun: None promptscript: pychecker timeout: 300 TBcheck: rtl_num: 20 correct_max: 3 discrim_mode: col_70_wrong_row_25_correct correct_mode: naive rtl_compens_en: True rtl_compens_max_iter: 3 itermax: 10 update_desc: False save_compile: False save_finalcodes: True error_interruption: False stage3: rtl_mode: auto max_inline_chars: 5000 save_rtl_file: True multi_tb: enabled: False auto_threshold_lines: 500 strategy: functional max_tb_count: 5 parallel: False merge_coverage: True _initialized: True ------------------------------------------ --------------default config-------------- run: version: 2.0 author: Ruidi Qiu - Technical University of Munich time: None custom_path: None mode: qwen-max save: en: True root: None pub: prefix: None dir: saves/$weekrange$/ subdir: log: en: True dir: logs/ notes: None cfg_pmode: iwantall debug_en: False level: TRACE message: en: True dir: messages/ format: json iverilog: en: True subdir: ivcode_nodebug load: prompt: path: config/initial_prompts/prompt1.txt pick_idx: [] stage_template: path: config/templates/stage_template0301.txt gpt: model: 4o key_path: config/key_API.json temperature: None json_mode: False chatgpt: start_form: chat one_time_talk: False rtlgen_model: None iverilog: dir: task_id: autoline: result_path: results cga: enabled: True max_iter: 10 target_coverage: 100.0 probset: path: None mutant_path: None gptgenRTL_path: None more_info_paths: [] only: ['review2015_fancytimer', 'fsm_ps2data', 'bugs_case', 'review2015_fsmonehot', 'review2015_fsmseq', 'lemmings4', 'ece241_2013_q8'] exclude: [] exclude_json: None filter: [{}] checklist: max: 3 debug: max: 5 reboot: 1 py_rollback: 2 onlyrun: None promptscript: None timeout: 300 TBcheck: rtl_num: 20 correct_max: 3 discrim_mode: col_full_wrong correct_mode: naive rtl_compens_en: True rtl_compens_max_iter: 3 itermax: 10 update_desc: False save_compile: True save_finalcodes: True error_interruption: False stage3: rtl_mode: auto max_inline_chars: 5000 save_rtl_file: True multi_tb: enabled: False auto_threshold_lines: 500 strategy: functional max_tb_count: 5 parallel: False merge_coverage: True ------------------------------------------ 2026-05-09 14:17:55 | INFO | all configurations are loaded, starting the main process... 2026-05-09 14:17:55 | INFO | 2026-05-09 14:17:55 | INFO | ######################### task 1/1 [i2c_controller] ######################### 2026-05-09 14:20:04 | INFO | [i2c_controller] [TBgen] stage_0 ends (128.31s used) 2026-05-09 14:21:21 | INFO | [i2c_controller] [TBgen] stage_1 ends (77.51s used) 2026-05-09 14:22:19 | INFO | [i2c_controller] [TBgen] stage_2 ends (57.85s used) 2026-05-09 14:24:31 | INFO | [i2c_controller] [TBgen] stage_3 ends (131.68s used) 2026-05-09 14:26:55 | INFO | [i2c_controller] [TBgen] stage_4 ends (144.22s used) 2026-05-09 14:26:55 | INFO | [i2c_controller] [TBgen] stage_checklist ends (0.00s used) 2026-05-09 19:29:29 | INFO | [i2c_controller] [TBgen] stage_4b ends (18154.63s used) 2026-05-09 19:31:00 | INFO | [i2c_controller] [TBgen] stage_5 ends (90.03s used) 2026-05-09 19:31:00 | INFO | [i2c_controller] 2026-05-09 19:31:00 | INFO | [i2c_controller] [TBsim] iverilog simulation failed! Debuging... (debug_iter = 1) 2026-05-09 20:07:46 | INFO | [i2c_controller] [TBsim] verilog iter - 1/3, total - 1/6: verilog DEBUG finished (2206.9s used) 2026-05-09 20:07:46 | INFO | [i2c_controller] [TBsim] iverilog simulation failed! Rebooting... (debug_iter = 2) 2026-05-09 20:09:06 | INFO | [i2c_controller] [TBsim] stage_4 ends (79.92s used) 2026-05-09 20:09:06 | INFO | [i2c_controller] [TBsim] stage_checklist ends (0.00s used) 2026-05-09 20:11:21 | INFO | [i2c_controller] [TBsim] stage_4b ends (134.81s used) 2026-05-09 20:11:21 | INFO | [i2c_controller] [TBsim] verilog iter - 2/3, total - 2/6: verilog REBOOT finished (214.75s used) 2026-05-09 20:11:21 | INFO | [i2c_controller] [TBsim] iverilog compilation : passed! 2026-05-09 20:11:21 | INFO | [i2c_controller] [TBsim] python simulation : passed! 2026-05-09 20:11:21 | INFO | [i2c_controller] [TBsim] TBsim finished : True! 2026-05-09 20:11:21 | INFO | [i2c_controller] 2026-05-09 20:11:21 | INFO | [i2c_controller] rtl list not found, generating naive rtls for testbench checking 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: swap_registers | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: invert_counter | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: invert_counter | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-05-09 20:11:21 | INFO | [i2c_controller] 20 mutation-based RTLs generated (from reference RTL) 2026-05-09 20:11:21 | INFO | [i2c_controller] [TBcheck] [discriminator] Plan 2: Capturing Reference RTL outputs as ground truth... 2026-05-09 20:11:21 | INFO | [i2c_controller] [TBcheck] [discriminator] Capturing Reference RTL outputs as ground truth... 2026-05-09 20:11:21 | INFO | [i2c_controller] [TBcheck] [discriminator] Captured Reference RTL outputs for 7 scenarios 2026-05-09 20:11:21 | INFO | [i2c_controller] [TBcheck] [discriminator] Plan 2: Captured outputs for 7 scenarios 2026-05-09 20:11:21 | INFO | [i2c_controller] [TBcheck] [discriminator] Discriminating the testbench, NO.0 discrimination 2026-05-09 20:11:22 | POSITIVE | [i2c_controller] [TBcheck] [discriminator] TB_discriminating finished, TB passed, wrong scenarios: [], scenario pass ratio: 7/7 2026-05-09 20:11:22 | INFO | [i2c_controller] [TBcheck] Testbench passed the funccheck 2026-05-09 20:11:22 | INFO | [i2c_controller] [TBcheck] self funccheck finished. Next Action: [pass] 2026-05-09 20:11:22 | INFO | [i2c_controller] 2026-05-09 20:11:22 | INFO | [i2c_controller] [i2c_controller] Starting Coverage-Guided Agent (CGA)... 2026-05-09 20:11:22 | INFO | [i2c_controller] [i2c_controller] Running Semantic Analysis (Layer 0)... 2026-05-09 20:11:22 | INFO | [i2c_controller] FSM detected: state (15 states) 2026-05-09 20:11:22 | INFO | [i2c_controller] Total function points identified: 16 2026-05-09 20:11:22 | INFO | [i2c_controller] Energy allocator initialized: 16 targets 2026-05-09 20:11:22 | INFO | [i2c_controller] Diversity injector initialized with history file: saves/0504~0510/MyExperimentsClean/MyProjectCleanI2C_20260509_141755/i2c_controller/CGA/test_history.json 2026-05-09 20:11:22 | INFO | [i2c_controller] Quality evaluator initialized 2026-05-09 20:11:22 | INFO | [i2c_controller] --- CGA Iter 0 (Baseline) --- 2026-05-09 20:11:23 | INFO | [i2c_controller] Baseline Coverage: 31.72% 2026-05-09 20:11:23 | INFO | [i2c_controller] --- CGA Iter 1 / 15 --- 2026-05-09 20:11:23 | INFO | [i2c_controller] Target: FSM_state 2026-05-09 20:11:23 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:12:04 | INFO | [i2c_controller] Quality Evaluation: diversity=1.00 2026-05-09 20:12:04 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-05-09 20:12:04 | INFO | [i2c_controller] --- CGA Iter 2 / 15 --- 2026-05-09 20:12:04 | INFO | [i2c_controller] Target: Counter_bit_count 2026-05-09 20:12:04 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:12:51 | WARNING | [i2c_controller] [CGA-2] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:13:11 | INFO | [i2c_controller] [CGA-2] Retry code generated successfully 2026-05-09 20:13:11 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-05-09 20:13:11 | ERROR | [i2c_controller] [CGA-2] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:13:11 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:13:11 | INFO | [i2c_controller] [CGA-2] Asking LLM to fix compilation errors... 2026-05-09 20:13:48 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-05-09 20:13:48 | INFO | [i2c_controller] Quality Evaluation: diversity=0.19 2026-05-09 20:13:48 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:13:48 | INFO | [i2c_controller] --- CGA Iter 3 / 15 --- 2026-05-09 20:13:48 | INFO | [i2c_controller] Target: Exception_DefaultCase 2026-05-09 20:13:48 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:14:06 | INFO | [i2c_controller] Quality Evaluation: diversity=0.19 2026-05-09 20:14:06 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-05-09 20:14:06 | INFO | [i2c_controller] --- CGA Iter 4 / 15 --- 2026-05-09 20:14:06 | INFO | [i2c_controller] Target: Condition_5 2026-05-09 20:14:06 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:14:55 | INFO | [i2c_controller] Quality Evaluation: diversity=0.17 2026-05-09 20:14:55 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-05-09 20:14:55 | INFO | [i2c_controller] --- CGA Iter 5 / 15 --- 2026-05-09 20:14:55 | INFO | [i2c_controller] Target: Condition_9 2026-05-09 20:14:55 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:15:09 | WARNING | [i2c_controller] [CGA-5] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:15:29 | INFO | [i2c_controller] [CGA-5] Retry code generated successfully 2026-05-09 20:15:32 | INFO | [i2c_controller] Quality Evaluation: diversity=0.18 2026-05-09 20:15:32 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-05-09 20:15:32 | INFO | [i2c_controller] --- CGA Iter 6 / 15 --- 2026-05-09 20:15:32 | INFO | [i2c_controller] Target: Condition_10 2026-05-09 20:15:32 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:15:53 | INFO | [i2c_controller] Quality Evaluation: diversity=0.18 2026-05-09 20:15:53 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-05-09 20:15:53 | INFO | [i2c_controller] --- CGA Iter 7 / 15 --- 2026-05-09 20:15:53 | INFO | [i2c_controller] Target: Condition_3 2026-05-09 20:15:53 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:16:29 | INFO | [i2c_controller] Quality Evaluation: diversity=0.20 2026-05-09 20:16:29 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-05-09 20:16:29 | INFO | [i2c_controller] --- CGA Iter 8 / 15 --- 2026-05-09 20:16:29 | INFO | [i2c_controller] Target: Condition_4 2026-05-09 20:16:29 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:17:08 | INFO | [i2c_controller] Quality Evaluation: diversity=0.23 2026-05-09 20:17:08 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-05-09 20:17:08 | INFO | [i2c_controller] --- CGA Iter 9 / 15 --- 2026-05-09 20:17:08 | INFO | [i2c_controller] Target: Condition_8 2026-05-09 20:17:08 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:17:55 | INFO | [i2c_controller] Quality Evaluation: diversity=0.21 2026-05-09 20:17:55 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-05-09 20:17:55 | INFO | [i2c_controller] --- CGA Iter 10 / 15 --- 2026-05-09 20:17:55 | INFO | [i2c_controller] Target: Condition_11 2026-05-09 20:17:55 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:18:40 | INFO | [i2c_controller] Quality Evaluation: diversity=0.18 2026-05-09 20:18:40 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-05-09 20:18:40 | INFO | [i2c_controller] --- CGA Iter 11 / 15 --- 2026-05-09 20:18:40 | INFO | [i2c_controller] Target: Counter_bit_count 2026-05-09 20:18:40 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:19:32 | INFO | [i2c_controller] Quality Evaluation: diversity=0.23 2026-05-09 20:19:32 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-05-09 20:19:32 | INFO | [i2c_controller] --- CGA Iter 12 / 15 --- 2026-05-09 20:19:32 | INFO | [i2c_controller] Target: Condition_1 2026-05-09 20:19:32 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:19:48 | INFO | [i2c_controller] Quality Evaluation: diversity=0.23 2026-05-09 20:19:48 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-05-09 20:19:48 | INFO | [i2c_controller] --- CGA Iter 13 / 15 --- 2026-05-09 20:19:48 | INFO | [i2c_controller] Target: Condition_2 2026-05-09 20:19:48 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:20:41 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-05-09 20:20:41 | ERROR | [i2c_controller] [CGA-13] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:20:41 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:20:41 | INFO | [i2c_controller] [CGA-13] Asking LLM to fix compilation errors... 2026-05-09 20:21:20 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-05-09 20:21:20 | INFO | [i2c_controller] Quality Evaluation: diversity=0.21 2026-05-09 20:21:20 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:21:20 | INFO | [i2c_controller] --- CGA Iter 14 / 15 --- 2026-05-09 20:21:20 | INFO | [i2c_controller] Target: Condition_6 2026-05-09 20:21:20 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:21:44 | WARNING | [i2c_controller] [CGA-14] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:22:11 | INFO | [i2c_controller] [CGA-14] Retry code generated successfully 2026-05-09 20:22:11 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-05-09 20:22:11 | ERROR | [i2c_controller] [CGA-14] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:22:11 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:22:11 | INFO | [i2c_controller] [CGA-14] Asking LLM to fix compilation errors... 2026-05-09 20:22:58 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-05-09 20:22:59 | INFO | [i2c_controller] Quality Evaluation: diversity=0.23 2026-05-09 20:22:59 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:22:59 | INFO | [i2c_controller] --- CGA Iter 15 / 15 --- 2026-05-09 20:22:59 | INFO | [i2c_controller] Target: Condition_7 2026-05-09 20:22:59 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-05-09 20:23:56 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-05-09 20:23:56 | ERROR | [i2c_controller] [CGA-15] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:23:56 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:23:56 | INFO | [i2c_controller] [CGA-15] Asking LLM to fix compilation errors... 2026-05-09 20:24:17 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-05-09 20:24:17 | INFO | [i2c_controller] Quality Evaluation: diversity=0.25 2026-05-09 20:24:17 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-05-09 20:24:17 | INFO | [i2c_controller] CGA Finished. Final Coverage: 31.72% 2026-05-09 20:24:17 | INFO | [i2c_controller] Unreachable analysis: 0 truly unreachable, 99 potentially coverable 2026-05-09 20:24:17 | INFO | [i2c_controller] No unreachable branches found in DUT. 2026-05-09 20:24:17 | INFO | [i2c_controller] Energy report saved to saves/0504~0510/MyExperimentsClean/MyProjectCleanI2C_20260509_141755/i2c_controller/CGA/energy_report.txt 2026-05-09 20:24:17 | INFO | [i2c_controller] Diversity report saved to saves/0504~0510/MyExperimentsClean/MyProjectCleanI2C_20260509_141755/i2c_controller/CGA/diversity_report.txt 2026-05-09 20:24:17 | INFO | [i2c_controller] Quality evaluation report saved to saves/0504~0510/MyExperimentsClean/MyProjectCleanI2C_20260509_141755/i2c_controller/CGA/quality_evaluation_report.txt 2026-05-09 20:24:17 | INFO | [i2c_controller] Semantic Coverage: 56.36% 2026-05-09 20:24:17 | INFO | [i2c_controller] Saved optimized TB to: saves/0504~0510/MyExperimentsClean/MyProjectCleanI2C_20260509_141755/i2c_controller/final_TB.v 2026-05-09 20:24:17 | INFO | [i2c_controller] [TBeval] Eval 1: Golden RTL checking begins 2026-05-09 20:24:17 | POSITIVE | [i2c_controller] [TBeval] Eval 1: Golden RTL checking passed! 2026-05-09 20:24:17 | INFO | [i2c_controller] 2026-05-09 20:24:17 | INFO | ########## Analyze of Chatbench_RunInfo ########## #### pass numbers: Eval2 : 0 Eval1 : 1 Eval0 : 1 total : 1 (Failed: 0) passed TB by autoline reboot action (from TB3_check): 0 passed TB by functional corrector: 0 #### CGA Coverage Info: Average Coverage : 31.72% Max Coverage : 31.72% Min Coverage : 31.72% #### tokens and cost: average prompt tokens: 101709 average completion tokens: 41129 total cost: 4.5019 average cost: 4.5019 #### time: average time: 21982.15s #### debug info table: FUNCTIONAL debug info table: (debugged here means functional debugging) | un-func-debugged | func-debugged | total | failed | 0 | 0 | 0 | Eval0 | 1 | 0 | 1 | Eval1 | 1 | 0 | 1 | Eval2 | 0 | 0 | 0 | #### Eval2 ratio: i2c_controller: No Eval2 ratio data #### CGA Coverage Detail List: Task ID | Coverage ---------------------------------------- i2c_controller | 31.72% loose Eval2 pass metric applied: 0.8