---------------custom config-------------- run: mode: autoline save: en: True pub: prefix: MyProjectCleanI2C subdir: MyExperimentsClean gpt: model: qwen-max rtlgen_model: qwen-max autoline: result_path: results/myproject_clean_i2c cga: enabled: True max_iter: 15 target_coverage: 100.0 probset: path: data/myproject/i2c_controller_clean.jsonl mutant_path: None more_info_paths: [] only: ['i2c_controller'] promptscript: pychecker timeout: 300 save_compile: False debug: max: 3 itermax: 10 update_desc: False TBcheck: discrim_mode: col_70_wrong_row_25_correct ------------------------------------------ ------config info (custom + default)------ run: version: 2.0 author: Ruidi Qiu - Technical University of Munich time: 20260423_105933 custom_path: config/myproject_clean_i2c.yaml mode: autoline hostname: localhost pid: 2121 pyversion: 3.12.3 (main, Mar 3 2026, 12:15:18) [GCC 13.3.0] save: en: True root: saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260423_105933/ pub: prefix: MyProjectCleanI2C dir: saves/0420~0426/ subdir: MyExperimentsClean/ log: en: True dir: logs/ notes: None cfg_pmode: iwantall debug_en: False level: TRACE message: en: True dir: messages/ format: json iverilog: en: True subdir: ivcode_nodebug load: prompt: path: config/initial_prompts/prompt1.txt pick_idx: [] stage_template: path: config/templates/stage_template0301.txt gpt: model: qwen-max key_path: config/key_API.json temperature: None json_mode: False chatgpt: start_form: chat one_time_talk: False rtlgen_model: qwen-max iverilog: dir: task_id: autoline: result_path: results/myproject_clean_i2c cga: enabled: True max_iter: 15 target_coverage: 100.0 probset: path: data/myproject/i2c_controller_clean.jsonl mutant_path: None gptgenRTL_path: None more_info_paths: [] only: ['i2c_controller'] exclude: [] exclude_json: None filter: [{}] checklist: max: 3 debug: max: 3 reboot: 1 py_rollback: 2 onlyrun: None promptscript: pychecker timeout: 300 TBcheck: rtl_num: 20 correct_max: 3 discrim_mode: col_70_wrong_row_25_correct correct_mode: naive rtl_compens_en: True rtl_compens_max_iter: 3 itermax: 10 update_desc: False save_compile: False save_finalcodes: True error_interruption: False stage3: rtl_mode: auto max_inline_chars: 5000 save_rtl_file: True multi_tb: enabled: False auto_threshold_lines: 500 strategy: functional max_tb_count: 5 parallel: False merge_coverage: True _initialized: True ------------------------------------------ --------------default config-------------- run: version: 2.0 author: Ruidi Qiu - Technical University of Munich time: None custom_path: None mode: qwen-max save: en: True root: None pub: prefix: None dir: saves/$weekrange$/ subdir: log: en: True dir: logs/ notes: None cfg_pmode: iwantall debug_en: False level: TRACE message: en: True dir: messages/ format: json iverilog: en: True subdir: ivcode_nodebug load: prompt: path: config/initial_prompts/prompt1.txt pick_idx: [] stage_template: path: config/templates/stage_template0301.txt gpt: model: 4o key_path: config/key_API.json temperature: None json_mode: False chatgpt: start_form: chat one_time_talk: False rtlgen_model: None iverilog: dir: task_id: autoline: result_path: results cga: enabled: True max_iter: 10 target_coverage: 100.0 probset: path: None mutant_path: None gptgenRTL_path: None more_info_paths: [] only: ['review2015_fancytimer', 'fsm_ps2data', 'bugs_case', 'review2015_fsmonehot', 'review2015_fsmseq', 'lemmings4', 'ece241_2013_q8'] exclude: [] exclude_json: None filter: [{}] checklist: max: 3 debug: max: 5 reboot: 1 py_rollback: 2 onlyrun: None promptscript: None timeout: 300 TBcheck: rtl_num: 20 correct_max: 3 discrim_mode: col_full_wrong correct_mode: naive rtl_compens_en: True rtl_compens_max_iter: 3 itermax: 10 update_desc: False save_compile: True save_finalcodes: True error_interruption: False stage3: rtl_mode: auto max_inline_chars: 5000 save_rtl_file: True multi_tb: enabled: False auto_threshold_lines: 500 strategy: functional max_tb_count: 5 parallel: False merge_coverage: True ------------------------------------------ 2026-04-23 10:59:33 | INFO | all configurations are loaded, starting the main process... 2026-04-23 10:59:33 | INFO | 2026-04-23 10:59:33 | INFO | ######################### task 1/1 [i2c_controller] ######################### 2026-04-23 11:00:52 | INFO | [i2c_controller] [TBgen] stage_0 ends (79.00s used) 2026-04-23 11:01:46 | INFO | [i2c_controller] [TBgen] stage_1 ends (54.16s used) 2026-04-23 11:02:40 | INFO | [i2c_controller] [TBgen] stage_2 ends (53.60s used) 2026-04-23 11:04:50 | INFO | [i2c_controller] [TBgen] stage_3 ends (130.10s used) 2026-04-23 11:11:59 | INFO | [i2c_controller] [TBgen] stage_4 ends (429.29s used) 2026-04-23 11:11:59 | INFO | [i2c_controller] [TBgen] stage_checklist ends (0.00s used) 2026-04-23 12:31:04 | INFO | [i2c_controller] [TBgen] stage_4b ends (4744.46s used) 2026-04-23 12:33:05 | INFO | [i2c_controller] [TBgen] stage_5 ends (121.23s used) 2026-04-23 12:33:05 | INFO | [i2c_controller] 2026-04-23 12:33:05 | INFO | [i2c_controller] [TBsim] iverilog compilation : passed! 2026-04-23 12:33:05 | ERROR | [i2c_controller] Error when running TBsim, iter: 1. Message: [Errno 2] No such file or directory: 'saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260423_105933/i2c_controller/1_1_TBgen/TBgen_codes/TBout.txt' | location: autoline/TB_autoline.py, func: run_stages_core, line: 389 | caller: location: autoline/TB_autoline.py, func: run_stages, line: 318 2026-04-23 12:33:05 | WARNING | [i2c_controller] ⚠️ Pipeline interrupted. Cooling down for 15s to avoid API Rate Limit... | location: autoline/TB_autoline.py, func: run_stages_core, line: 394 | caller: location: autoline/TB_autoline.py, func: run_stages, line: 318 2026-04-23 12:34:22 | INFO | [i2c_controller] [TBgen] stage_0 ends (61.61s used) 2026-04-23 12:35:18 | INFO | [i2c_controller] [TBgen] stage_1 ends (55.72s used) 2026-04-23 12:35:44 | INFO | [i2c_controller] [TBgen] stage_2 ends (26.59s used) 2026-04-23 12:37:16 | INFO | [i2c_controller] [TBgen] stage_3 ends (92.16s used) 2026-04-23 12:38:41 | INFO | [i2c_controller] [TBgen] stage_4 ends (84.15s used) 2026-04-23 12:38:41 | INFO | [i2c_controller] [TBgen] stage_checklist ends (0.00s used) 2026-04-23 12:43:10 | INFO | [i2c_controller] [TBgen] stage_4b ends (269.07s used) 2026-04-23 12:44:50 | INFO | [i2c_controller] [TBgen] stage_5 ends (100.43s used) 2026-04-23 12:44:50 | INFO | [i2c_controller] 2026-04-23 12:44:50 | INFO | [i2c_controller] [TBsim] iverilog simulation failed! Debuging... (debug_iter = 1) 2026-04-23 12:49:34 | INFO | [i2c_controller] [TBsim] verilog iter - 1/3, total - 1/6: verilog DEBUG finished (283.74s used) 2026-04-23 12:49:34 | INFO | [i2c_controller] [TBsim] iverilog simulation failed! Rebooting... (debug_iter = 2) 2026-04-23 12:51:57 | INFO | [i2c_controller] [TBsim] stage_4 ends (143.35s used) 2026-04-23 12:51:57 | INFO | [i2c_controller] [TBsim] stage_checklist ends (0.00s used) 2026-04-23 13:01:45 | INFO | [i2c_controller] [TBsim] stage_4b ends (587.62s used) 2026-04-23 13:01:45 | INFO | [i2c_controller] [TBsim] verilog iter - 2/3, total - 2/6: verilog REBOOT finished (730.98s used) 2026-04-23 13:01:45 | INFO | [i2c_controller] [TBsim] iverilog simulation failed! Debuging... (debug_iter = 3) 2026-04-23 14:20:52 | ERROR | [i2c_controller] Error when running TBsim, iter: 2. Message: list index out of range | location: autoline/TB_autoline.py, func: run_stages_core, line: 389 | caller: location: autoline/TB_autoline.py, func: run_stages, line: 318 2026-04-23 14:20:52 | WARNING | [i2c_controller] ⚠️ Pipeline interrupted. Cooling down for 15s to avoid API Rate Limit... | location: autoline/TB_autoline.py, func: run_stages_core, line: 394 | caller: location: autoline/TB_autoline.py, func: run_stages, line: 318 2026-04-23 14:21:59 | INFO | [i2c_controller] [TBgen] stage_0 ends (48.51s used) 2026-04-23 14:22:39 | INFO | [i2c_controller] [TBgen] stage_1 ends (40.14s used) 2026-04-23 14:23:38 | INFO | [i2c_controller] [TBgen] stage_2 ends (58.86s used) 2026-04-23 14:24:47 | INFO | [i2c_controller] [TBgen] stage_3 ends (68.97s used) 2026-04-23 14:26:38 | INFO | [i2c_controller] [TBgen] stage_4 ends (111.17s used) 2026-04-23 14:26:38 | INFO | [i2c_controller] [TBgen] stage_checklist ends (0.00s used) 2026-04-23 14:30:35 | INFO | [i2c_controller] [TBgen] stage_4b ends (236.81s used) 2026-04-23 14:32:05 | INFO | [i2c_controller] [TBgen] stage_5 ends (90.51s used) 2026-04-23 14:32:05 | INFO | [i2c_controller] 2026-04-23 14:32:05 | INFO | [i2c_controller] [TBsim] iverilog simulation failed! Debuging... (debug_iter = 1) 2026-04-23 14:36:55 | INFO | [i2c_controller] [TBsim] verilog iter - 1/3, total - 1/6: verilog DEBUG finished (290.36s used) 2026-04-23 14:36:55 | INFO | [i2c_controller] [TBsim] iverilog compilation : passed! 2026-04-23 14:36:56 | INFO | [i2c_controller] [TBsim] python simulation : passed! 2026-04-23 14:36:56 | INFO | [i2c_controller] [TBsim] TBsim finished : True! 2026-04-23 14:36:56 | INFO | [i2c_controller] 2026-04-23 14:36:56 | INFO | [i2c_controller] rtl list not found, generating naive rtls for testbench checking 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: invert_counter | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: swap_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33 2026-04-23 14:36:56 | INFO | [i2c_controller] 20 mutation-based RTLs generated (from reference RTL) 2026-04-23 14:36:56 | INFO | [i2c_controller] [TBcheck] [discriminator] Plan 2: Capturing Reference RTL outputs as ground truth... 2026-04-23 14:36:56 | INFO | [i2c_controller] [TBcheck] [discriminator] Capturing Reference RTL outputs as ground truth... 2026-04-23 14:36:56 | INFO | [i2c_controller] [TBcheck] [discriminator] Reference RTL check results: failed scenarios = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10], passed scenarios = [] 2026-04-23 14:36:56 | INFO | [i2c_controller] [TBcheck] [discriminator] Captured Reference RTL outputs for 10 scenarios 2026-04-23 14:36:56 | INFO | [i2c_controller] [TBcheck] [discriminator] Plan 2: Captured outputs for 10 scenarios 2026-04-23 14:36:56 | INFO | [i2c_controller] [TBcheck] [discriminator] Discriminating the testbench, NO.0 discrimination 2026-04-23 14:36:58 | POSITIVE | [i2c_controller] [TBcheck] [discriminator] TB_discriminating finished, TB passed, wrong scenarios: [], scenario pass ratio: 10/10 2026-04-23 14:36:58 | INFO | [i2c_controller] [TBcheck] Testbench passed the funccheck 2026-04-23 14:36:58 | INFO | [i2c_controller] [TBcheck] self funccheck finished. Next Action: [pass] 2026-04-23 14:36:58 | INFO | [i2c_controller] 2026-04-23 14:36:58 | INFO | [i2c_controller] [i2c_controller] Starting Coverage-Guided Agent (CGA)... 2026-04-23 14:36:58 | INFO | [i2c_controller] [i2c_controller] Running Semantic Analysis (Layer 0)... 2026-04-23 14:36:58 | INFO | [i2c_controller] FSM detected: state (15 states) 2026-04-23 14:36:58 | INFO | [i2c_controller] Total function points identified: 16 2026-04-23 14:36:58 | INFO | [i2c_controller] Energy allocator initialized: 16 targets 2026-04-23 14:36:58 | INFO | [i2c_controller] Diversity injector initialized with history file: saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260423_105933/i2c_controller/CGA/test_history.json 2026-04-23 14:36:58 | INFO | [i2c_controller] Quality evaluator initialized 2026-04-23 14:36:58 | INFO | [i2c_controller] --- CGA Iter 0 (Baseline) --- 2026-04-23 14:37:00 | INFO | [i2c_controller] Baseline Coverage: 31.72% 2026-04-23 14:37:00 | INFO | [i2c_controller] --- CGA Iter 1 / 15 --- 2026-04-23 14:37:00 | INFO | [i2c_controller] Target: FSM_state 2026-04-23 14:37:00 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 14:37:51 | WARNING | [i2c_controller] [CGA-1] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:38:16 | INFO | [i2c_controller] [CGA-1] Retry code generated successfully 2026-04-23 14:38:16 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-04-23 14:38:16 | ERROR | [i2c_controller] [CGA-1] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:38:16 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:38:16 | INFO | [i2c_controller] [CGA-1] Asking LLM to fix compilation errors... 2026-04-23 14:38:56 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-04-23 14:38:56 | INFO | [i2c_controller] Quality Evaluation: diversity=1.00 2026-04-23 14:38:56 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:38:56 | INFO | [i2c_controller] --- CGA Iter 2 / 15 --- 2026-04-23 14:38:56 | INFO | [i2c_controller] Target: Counter_bit_count 2026-04-23 14:38:56 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 14:39:37 | WARNING | [i2c_controller] [CGA-2] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:39:58 | INFO | [i2c_controller] [CGA-2] Retry code generated successfully 2026-04-23 14:39:58 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-04-23 14:39:58 | ERROR | [i2c_controller] [CGA-2] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:39:58 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:39:58 | INFO | [i2c_controller] [CGA-2] Asking LLM to fix compilation errors... 2026-04-23 14:40:42 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-04-23 14:40:42 | INFO | [i2c_controller] Quality Evaluation: diversity=0.12 2026-04-23 14:40:42 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:40:42 | INFO | [i2c_controller] --- CGA Iter 3 / 15 --- 2026-04-23 14:40:42 | INFO | [i2c_controller] Target: Exception_DefaultCase 2026-04-23 14:40:42 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 14:41:15 | WARNING | [i2c_controller] [CGA-3] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:41:28 | INFO | [i2c_controller] [CGA-3] Retry code generated successfully 2026-04-23 14:41:30 | INFO | [i2c_controller] Quality Evaluation: diversity=0.24 2026-04-23 14:41:30 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-04-23 14:41:30 | INFO | [i2c_controller] --- CGA Iter 4 / 15 --- 2026-04-23 14:41:30 | INFO | [i2c_controller] Target: FSM_state 2026-04-23 14:41:30 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 14:41:58 | WARNING | [i2c_controller] [CGA-4] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:42:19 | INFO | [i2c_controller] [CGA-4] Retry code generated successfully 2026-04-23 14:42:19 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-04-23 14:42:19 | ERROR | [i2c_controller] [CGA-4] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:42:19 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:42:19 | INFO | [i2c_controller] [CGA-4] Asking LLM to fix compilation errors... 2026-04-23 14:42:43 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-04-23 14:42:43 | INFO | [i2c_controller] Quality Evaluation: diversity=0.19 2026-04-23 14:42:43 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:42:43 | INFO | [i2c_controller] --- CGA Iter 5 / 15 --- 2026-04-23 14:42:43 | INFO | [i2c_controller] Target: Condition_5 2026-04-23 14:42:43 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 14:43:16 | WARNING | [i2c_controller] [CGA-5] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:43:38 | INFO | [i2c_controller] [CGA-5] Retry code generated successfully 2026-04-23 14:43:38 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-04-23 14:43:38 | ERROR | [i2c_controller] [CGA-5] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:43:38 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:43:38 | INFO | [i2c_controller] [CGA-5] Asking LLM to fix compilation errors... 2026-04-23 14:44:17 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-04-23 14:44:17 | INFO | [i2c_controller] Quality Evaluation: diversity=0.21 2026-04-23 14:44:17 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:44:17 | INFO | [i2c_controller] --- CGA Iter 6 / 15 --- 2026-04-23 14:44:17 | INFO | [i2c_controller] Target: Condition_9 2026-04-23 14:44:17 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 14:45:11 | WARNING | [i2c_controller] [CGA-6] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:46:03 | INFO | [i2c_controller] [CGA-6] Retry code generated successfully 2026-04-23 14:46:03 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-04-23 14:46:03 | ERROR | [i2c_controller] [CGA-6] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:46:03 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:46:03 | INFO | [i2c_controller] [CGA-6] Asking LLM to fix compilation errors... 2026-04-23 14:46:35 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-04-23 14:46:35 | INFO | [i2c_controller] Quality Evaluation: diversity=0.24 2026-04-23 14:46:35 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:46:35 | INFO | [i2c_controller] --- CGA Iter 7 / 15 --- 2026-04-23 14:46:35 | INFO | [i2c_controller] Target: Condition_10 2026-04-23 14:46:35 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 14:47:18 | WARNING | [i2c_controller] [CGA-7] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:47:57 | INFO | [i2c_controller] [CGA-7] Retry code generated successfully 2026-04-23 14:47:57 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-04-23 14:47:57 | ERROR | [i2c_controller] [CGA-7] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:47:57 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:47:57 | INFO | [i2c_controller] [CGA-7] Asking LLM to fix compilation errors... 2026-04-23 14:48:43 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-04-23 14:48:44 | INFO | [i2c_controller] Quality Evaluation: diversity=0.30 2026-04-23 14:48:44 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:48:44 | INFO | [i2c_controller] --- CGA Iter 8 / 15 --- 2026-04-23 14:48:44 | INFO | [i2c_controller] Target: Condition_3 2026-04-23 14:48:44 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 14:49:43 | WARNING | [i2c_controller] [CGA-8] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:50:17 | INFO | [i2c_controller] [CGA-8] Retry code generated successfully 2026-04-23 14:50:17 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-04-23 14:50:17 | ERROR | [i2c_controller] [CGA-8] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:50:17 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:50:17 | INFO | [i2c_controller] [CGA-8] Asking LLM to fix compilation errors... 2026-04-23 14:51:06 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-04-23 14:51:06 | INFO | [i2c_controller] Quality Evaluation: diversity=0.28 2026-04-23 14:51:06 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:51:06 | INFO | [i2c_controller] --- CGA Iter 9 / 15 --- 2026-04-23 14:51:06 | INFO | [i2c_controller] Target: Condition_4 2026-04-23 14:51:06 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 14:51:49 | WARNING | [i2c_controller] [CGA-9] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:52:15 | INFO | [i2c_controller] [CGA-9] Retry code generated successfully 2026-04-23 14:52:15 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-04-23 14:52:15 | ERROR | [i2c_controller] [CGA-9] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:52:15 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:52:15 | INFO | [i2c_controller] [CGA-9] Asking LLM to fix compilation errors... 2026-04-23 14:52:46 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-04-23 14:52:47 | INFO | [i2c_controller] Quality Evaluation: diversity=0.30 2026-04-23 14:52:47 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:52:47 | INFO | [i2c_controller] --- CGA Iter 10 / 15 --- 2026-04-23 14:52:47 | INFO | [i2c_controller] Target: Condition_8 2026-04-23 14:52:47 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 14:53:22 | WARNING | [i2c_controller] [CGA-10] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:53:37 | INFO | [i2c_controller] [CGA-10] Retry code generated successfully 2026-04-23 14:53:39 | INFO | [i2c_controller] Quality Evaluation: diversity=0.31 2026-04-23 14:53:39 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-04-23 14:53:39 | INFO | [i2c_controller] --- CGA Iter 11 / 15 --- 2026-04-23 14:53:39 | INFO | [i2c_controller] Target: Condition_11 2026-04-23 14:53:39 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 14:54:25 | WARNING | [i2c_controller] [CGA-11] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:55:07 | INFO | [i2c_controller] [CGA-11] Retry code generated successfully 2026-04-23 14:55:07 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-04-23 14:55:07 | ERROR | [i2c_controller] [CGA-11] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:55:07 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:55:07 | INFO | [i2c_controller] [CGA-11] Asking LLM to fix compilation errors... 2026-04-23 14:55:57 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-04-23 14:55:57 | INFO | [i2c_controller] Quality Evaluation: diversity=0.31 2026-04-23 14:55:57 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:55:57 | INFO | [i2c_controller] --- CGA Iter 12 / 15 --- 2026-04-23 14:55:57 | INFO | [i2c_controller] Target: Condition_1 2026-04-23 14:55:57 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 14:57:22 | WARNING | [i2c_controller] [CGA-12] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:58:47 | INFO | [i2c_controller] [CGA-12] Retry code generated successfully 2026-04-23 14:58:47 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-04-23 14:58:47 | ERROR | [i2c_controller] [CGA-12] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:58:47 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:58:47 | INFO | [i2c_controller] [CGA-12] Asking LLM to fix compilation errors... 2026-04-23 14:59:42 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-04-23 14:59:42 | INFO | [i2c_controller] Quality Evaluation: diversity=0.30 2026-04-23 14:59:42 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 14:59:42 | INFO | [i2c_controller] --- CGA Iter 13 / 15 --- 2026-04-23 14:59:42 | INFO | [i2c_controller] Target: Condition_2 2026-04-23 14:59:42 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 15:00:53 | WARNING | [i2c_controller] [CGA-13] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 15:01:54 | INFO | [i2c_controller] [CGA-13] Retry code generated successfully 2026-04-23 15:01:54 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523 2026-04-23 15:01:54 | ERROR | [i2c_controller] [CGA-13] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 15:01:54 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 15:01:54 | INFO | [i2c_controller] [CGA-13] Asking LLM to fix compilation errors... 2026-04-23 15:03:01 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552 2026-04-23 15:03:01 | INFO | [i2c_controller] Quality Evaluation: diversity=0.31 2026-04-23 15:03:01 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 15:03:01 | INFO | [i2c_controller] --- CGA Iter 14 / 15 --- 2026-04-23 15:03:01 | INFO | [i2c_controller] Target: Condition_6 2026-04-23 15:03:01 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 15:04:15 | INFO | [i2c_controller] Quality Evaluation: diversity=0.32 2026-04-23 15:04:15 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-04-23 15:04:15 | INFO | [i2c_controller] --- CGA Iter 15 / 15 --- 2026-04-23 15:04:15 | INFO | [i2c_controller] Target: Condition_7 2026-04-23 15:04:15 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)... 2026-04-23 15:05:28 | WARNING | [i2c_controller] [CGA-15] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302 2026-04-23 15:05:49 | INFO | [i2c_controller] [CGA-15] Retry code generated successfully 2026-04-23 15:05:53 | INFO | [i2c_controller] Quality Evaluation: diversity=0.29 2026-04-23 15:05:53 | INFO | [i2c_controller] Coverage unchanged. Keeping previous. 2026-04-23 15:05:53 | INFO | [i2c_controller] CGA Finished. Final Coverage: 31.72% 2026-04-23 15:05:53 | INFO | [i2c_controller] Unreachable analysis: 0 truly unreachable, 99 potentially coverable 2026-04-23 15:05:53 | INFO | [i2c_controller] No unreachable branches found in DUT. 2026-04-23 15:05:53 | INFO | [i2c_controller] Energy report saved to saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260423_105933/i2c_controller/CGA/energy_report.txt 2026-04-23 15:05:53 | INFO | [i2c_controller] Diversity report saved to saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260423_105933/i2c_controller/CGA/diversity_report.txt 2026-04-23 15:05:53 | INFO | [i2c_controller] Quality evaluation report saved to saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260423_105933/i2c_controller/CGA/quality_evaluation_report.txt 2026-04-23 15:05:53 | INFO | [i2c_controller] Semantic Coverage: 56.36% 2026-04-23 15:05:53 | INFO | [i2c_controller] Saved optimized TB to: saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260423_105933/i2c_controller/final_TB.v 2026-04-23 15:05:53 | INFO | [i2c_controller] [TBeval] Eval 1: Golden RTL checking begins 2026-04-23 15:05:54 | FAILED | [i2c_controller] [TBeval] Eval 1: Golden RTL checking failed! 2026-04-23 15:05:54 | INFO | [i2c_controller] [TBeval] [i2c_controller] Eval 2/2b is skipped because Eval 1 failed 2026-04-23 15:05:54 | INFO | [i2c_controller] 2026-04-23 15:05:54 | INFO | ########## Analyze of Chatbench_RunInfo ########## #### pass numbers: Eval2 : 0 Eval1 : 0 Eval0 : 1 total : 1 (Failed: 0) passed TB by autoline reboot action (from TB3_check): 0 passed TB by functional corrector: 0 #### CGA Coverage Info: Average Coverage : 31.72% Max Coverage : 31.72% Min Coverage : 31.72% #### tokens and cost: average prompt tokens: 150074 average completion tokens: 90881 total cost: 8.4543 average cost: 8.4543 #### time: average time: 14780.42s #### debug info table: FUNCTIONAL debug info table: (debugged here means functional debugging) | un-func-debugged | func-debugged | total | failed | 0 | 0 | 0 | Eval0 | 0 | 1 | 1 | Eval1 | 0 | 0 | 0 | Eval2 | 0 | 0 | 0 | #### Eval2 ratio: #### CGA Coverage Detail List: Task ID | Coverage ---------------------------------------- i2c_controller | 31.72% loose Eval2 pass metric applied: 0.8