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CGA-bench/data/temp_single_task.jsonl

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2026-05-22 10:02:42 +08:00
{"task_id": "fsm_ps2data", "task_number": 1, "description": "We want a finite state machine that will search for message boundaries when given an input byte stream. The algorithm we'll use is to discard bytes until we see one with in[3]=1. We then assume that this is byte 1 of a message, and signal the receipt of a message once all 3 bytes have been received (done). The FSM should signal done in the cycle immediately after the third byte of each message was successfully received.\n\n// Implement the datapath module that will output the 24-bit (3 byte) message whenever a packet is received (out_bytes[23:16] is the first byte, out_bytes[15:8] is the second byte, etc.). The reset signal is active high synchronous. out_bytes needs to be valid whenever the done signal is asserted. You may output anything at other times (i.e., don't-care). \n\n// Waveform example:\n// time clk reset in[7:0] done out_bytes \n// 0ns 0 1 0 x x \n// 5ns 1 1 0 0 x \n// 10ns 0 1 0 0 x \n// 15ns 1 0 2c 0 x \n// 20ns 0 0 2c 0 x \n// 25ns 1 0 81 0 x \n// 30ns 0 0 81 0 x \n// 35ns 1 0 9 0 x \n// 40ns 0 0 9 0 x \n// 45ns 1 0 6b 1 2c8109 \n// 50ns 0 0 6b 1 2c8109 \n// 55ns 1 0 d 0 x \n// 60ns 0 0 d 0 x \n// 65ns 1 0 8d 0 x \n// 70ns 0 0 8d 0 x \n// 75ns 1 0 6d 1 6b0d8d \n// 80ns 0 0 6d 1 6b0d8d \n// 85ns 1 0 12 0 x \n// 90ns 0 0 12 0 x \n// 95ns 1 0 1 0 x \n// 100ns 0 0 1 0 x \n// 105ns 1 0 d 1 6d1201 \n// 110ns 0 0 d 1 6d1201 \n// 115ns 1 0 76 0 x \n// 120ns 0 0 76 0 x \n// 125ns 1 0 3d 0 x \n// 130ns 0 0 3d 0 x \n// 135ns 1 0 ed 1 d763d \n// 140ns 0 0 ed 1 d763d \n// 145ns 1 0 8c 0 x \n// 150ns 0 0 8c 0 x