533 lines
43 KiB
Plaintext
533 lines
43 KiB
Plaintext
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---------------custom config--------------
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run:
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mode: autoline
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save:
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en: True
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pub:
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prefix: MyProjectCleanI2C
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subdir: MyExperimentsClean
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gpt:
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model: qwen-max
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rtlgen_model: qwen-max
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autoline:
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result_path: results/myproject_clean_i2c
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cga:
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enabled: True
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max_iter: 15
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target_coverage: 100.0
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probset:
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path: data/myproject/i2c_controller_clean.jsonl
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mutant_path: None
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more_info_paths: []
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only: ['i2c_controller']
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promptscript: pychecker
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timeout: 300
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save_compile: False
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debug:
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max: 3
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itermax: 10
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update_desc: False
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TBcheck:
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discrim_mode: col_70_wrong_row_25_correct
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------------------------------------------
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------config info (custom + default)------
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run:
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version: 2.0
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author: Ruidi Qiu - Technical University of Munich
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time: 20260422_145630
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custom_path: config/myproject_clean_i2c.yaml
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mode: autoline
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hostname: localhost
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pid: 489733
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pyversion: 3.12.3 (main, Mar 3 2026, 12:15:18) [GCC 13.3.0]
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save:
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en: True
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root: saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260422_145630/
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pub:
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prefix: MyProjectCleanI2C
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dir: saves/0420~0426/
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subdir: MyExperimentsClean/
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log:
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en: True
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dir: logs/
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notes: None
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cfg_pmode: iwantall
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debug_en: False
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level: TRACE
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message:
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en: True
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dir: messages/
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format: json
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iverilog:
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en: True
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subdir: ivcode_nodebug
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load:
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prompt:
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path: config/initial_prompts/prompt1.txt
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pick_idx: []
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stage_template:
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path: config/templates/stage_template0301.txt
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gpt:
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model: qwen-max
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key_path: config/key_API.json
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temperature: None
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json_mode: False
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chatgpt:
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start_form: chat
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one_time_talk: False
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rtlgen_model: qwen-max
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iverilog:
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dir:
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task_id:
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autoline:
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result_path: results/myproject_clean_i2c
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cga:
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enabled: True
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max_iter: 15
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target_coverage: 100.0
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probset:
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path: data/myproject/i2c_controller_clean.jsonl
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mutant_path: None
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gptgenRTL_path: None
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more_info_paths: []
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only: ['i2c_controller']
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exclude: []
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exclude_json: None
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filter: [{}]
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checklist:
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max: 3
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debug:
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max: 3
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reboot: 1
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py_rollback: 2
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onlyrun: None
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promptscript: pychecker
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timeout: 300
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TBcheck:
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rtl_num: 20
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correct_max: 3
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discrim_mode: col_70_wrong_row_25_correct
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correct_mode: naive
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rtl_compens_en: True
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rtl_compens_max_iter: 3
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itermax: 10
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update_desc: False
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save_compile: False
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save_finalcodes: True
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error_interruption: False
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stage3:
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rtl_mode: auto
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max_inline_chars: 5000
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save_rtl_file: True
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multi_tb:
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enabled: False
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auto_threshold_lines: 500
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strategy: functional
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max_tb_count: 5
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parallel: False
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merge_coverage: True
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_initialized: True
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------------------------------------------
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--------------default config--------------
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run:
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version: 2.0
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author: Ruidi Qiu - Technical University of Munich
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time: None
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custom_path: None
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mode: qwen-max
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save:
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en: True
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root: None
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pub:
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prefix: None
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dir: saves/$weekrange$/
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subdir:
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log:
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en: True
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dir: logs/
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notes: None
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cfg_pmode: iwantall
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debug_en: False
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level: TRACE
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message:
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en: True
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dir: messages/
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format: json
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iverilog:
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en: True
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subdir: ivcode_nodebug
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load:
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prompt:
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path: config/initial_prompts/prompt1.txt
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pick_idx: []
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stage_template:
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path: config/templates/stage_template0301.txt
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gpt:
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model: 4o
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key_path: config/key_API.json
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temperature: None
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json_mode: False
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chatgpt:
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start_form: chat
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one_time_talk: False
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rtlgen_model: None
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iverilog:
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dir:
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task_id:
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autoline:
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result_path: results
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cga:
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enabled: True
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max_iter: 10
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target_coverage: 100.0
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probset:
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path: None
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mutant_path: None
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gptgenRTL_path: None
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more_info_paths: []
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only: ['review2015_fancytimer', 'fsm_ps2data', 'bugs_case', 'review2015_fsmonehot', 'review2015_fsmseq', 'lemmings4', 'ece241_2013_q8']
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exclude: []
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exclude_json: None
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filter: [{}]
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checklist:
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max: 3
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debug:
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max: 5
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reboot: 1
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py_rollback: 2
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onlyrun: None
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promptscript: None
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timeout: 300
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TBcheck:
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rtl_num: 20
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correct_max: 3
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discrim_mode: col_full_wrong
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correct_mode: naive
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rtl_compens_en: True
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rtl_compens_max_iter: 3
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itermax: 10
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update_desc: False
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save_compile: True
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save_finalcodes: True
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error_interruption: False
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stage3:
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rtl_mode: auto
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max_inline_chars: 5000
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save_rtl_file: True
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multi_tb:
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enabled: False
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auto_threshold_lines: 500
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strategy: functional
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max_tb_count: 5
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parallel: False
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merge_coverage: True
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------------------------------------------
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2026-04-22 14:56:30 | INFO | all configurations are loaded, starting the main process...
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2026-04-22 14:56:30 | INFO |
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2026-04-22 14:56:30 | INFO | ######################### task 1/1 [i2c_controller] #########################
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2026-04-22 14:57:52 | INFO | [i2c_controller] [TBgen] stage_0 ends (82.31s used)
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2026-04-22 14:58:33 | INFO | [i2c_controller] [TBgen] stage_1 ends (41.56s used)
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2026-04-22 14:59:14 | INFO | [i2c_controller] [TBgen] stage_2 ends (41.02s used)
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2026-04-22 15:01:19 | INFO | [i2c_controller] [TBgen] stage_3 ends (124.41s used)
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2026-04-22 15:03:32 | INFO | [i2c_controller] [TBgen] stage_4 ends (132.92s used)
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2026-04-22 15:03:32 | INFO | [i2c_controller] [TBgen] stage_checklist ends (0.00s used)
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2026-04-22 15:07:05 | INFO | [i2c_controller] [TBgen] stage_4b ends (213.05s used)
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2026-04-22 15:08:45 | INFO | [i2c_controller] [TBgen] stage_5 ends (100.47s used)
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2026-04-22 15:08:45 | INFO | [i2c_controller]
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2026-04-22 15:08:45 | INFO | [i2c_controller] [TBsim] iverilog simulation failed! Debuging... (debug_iter = 1)
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2026-04-22 16:24:42 | ERROR | [i2c_controller] Error when running TBsim, iter: 1. Message: list index out of range | location: autoline/TB_autoline.py, func: run_stages_core, line: 389 | caller: location: autoline/TB_autoline.py, func: run_stages, line: 318
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2026-04-22 16:24:42 | WARNING | [i2c_controller] ⚠️ Pipeline interrupted. Cooling down for 15s to avoid API Rate Limit... | location: autoline/TB_autoline.py, func: run_stages_core, line: 394 | caller: location: autoline/TB_autoline.py, func: run_stages, line: 318
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2026-04-22 16:26:32 | INFO | [i2c_controller] [TBgen] stage_0 ends (94.49s used)
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2026-04-22 16:27:16 | INFO | [i2c_controller] [TBgen] stage_1 ends (44.56s used)
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2026-04-22 16:28:24 | INFO | [i2c_controller] [TBgen] stage_2 ends (67.68s used)
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2026-04-22 16:30:20 | INFO | [i2c_controller] [TBgen] stage_3 ends (115.94s used)
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2026-04-22 16:32:28 | INFO | [i2c_controller] [TBgen] stage_4 ends (128.04s used)
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2026-04-22 16:32:28 | INFO | [i2c_controller] [TBgen] stage_checklist ends (0.00s used)
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2026-04-22 16:37:18 | INFO | [i2c_controller] [TBgen] stage_4b ends (289.48s used)
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2026-04-22 16:38:48 | INFO | [i2c_controller] [TBgen] stage_5 ends (90.61s used)
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2026-04-22 16:38:48 | INFO | [i2c_controller]
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2026-04-22 16:38:48 | INFO | [i2c_controller] [TBsim] iverilog compilation : passed!
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2026-04-22 16:38:48 | INFO | [i2c_controller] [TBsim] python simulation : passed!
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2026-04-22 16:38:48 | INFO | [i2c_controller] [TBsim] TBsim finished : True!
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2026-04-22 16:38:48 | INFO | [i2c_controller]
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2026-04-22 16:38:48 | INFO | [i2c_controller] rtl list not found, generating naive rtls for testbench checking
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: invert_counter | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: missing_assignment | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: invert_counter | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: swap_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: single_bit_flip | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: tiny_offset | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | DEBUG | [i2c_controller] Applied mutation: bit_index_shift | location: autoline/rtl_mutator.py, func: _safe_log, line: 33
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2026-04-22 16:38:48 | INFO | [i2c_controller] 20 mutation-based RTLs generated (from reference RTL)
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2026-04-22 16:38:48 | INFO | [i2c_controller] [TBcheck] [discriminator] Plan 2: Capturing Reference RTL outputs as ground truth...
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2026-04-22 16:38:48 | INFO | [i2c_controller] [TBcheck] [discriminator] Capturing Reference RTL outputs as ground truth...
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2026-04-22 16:38:49 | INFO | [i2c_controller] [TBcheck] [discriminator] Reference RTL check results: failed scenarios = [1, 2, 3, 4, 5, 6, 7, 8, 9, 10], passed scenarios = []
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2026-04-22 16:38:49 | INFO | [i2c_controller] [TBcheck] [discriminator] Captured Reference RTL outputs for 10 scenarios
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2026-04-22 16:38:49 | INFO | [i2c_controller] [TBcheck] [discriminator] Plan 2: Captured outputs for 10 scenarios
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2026-04-22 16:38:49 | INFO | [i2c_controller] [TBcheck] [discriminator] Discriminating the testbench, NO.0 discrimination
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2026-04-22 16:38:51 | POSITIVE | [i2c_controller] [TBcheck] [discriminator] TB_discriminating finished, TB passed, wrong scenarios: [], scenario pass ratio: 10/10
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2026-04-22 16:38:51 | INFO | [i2c_controller] [TBcheck] Testbench passed the funccheck
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2026-04-22 16:38:51 | INFO | [i2c_controller] [TBcheck] self funccheck finished. Next Action: [pass]
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2026-04-22 16:38:51 | INFO | [i2c_controller]
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2026-04-22 16:38:51 | INFO | [i2c_controller] [i2c_controller] Starting Coverage-Guided Agent (CGA)...
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2026-04-22 16:38:51 | INFO | [i2c_controller] [i2c_controller] Running Semantic Analysis (Layer 0)...
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2026-04-22 16:38:51 | INFO | [i2c_controller] FSM detected: state (15 states)
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2026-04-22 16:38:51 | INFO | [i2c_controller] Total function points identified: 16
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2026-04-22 16:38:51 | INFO | [i2c_controller] Energy allocator initialized: 16 targets
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2026-04-22 16:38:51 | INFO | [i2c_controller] Diversity injector initialized with history file: saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260422_145630/i2c_controller/CGA/test_history.json
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2026-04-22 16:38:51 | INFO | [i2c_controller] Quality evaluator initialized
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|
2026-04-22 16:38:51 | INFO | [i2c_controller] --- CGA Iter 0 (Baseline) ---
|
||
|
|
2026-04-22 16:38:53 | INFO | [i2c_controller] Baseline Coverage: 31.72%
|
||
|
|
2026-04-22 16:38:53 | INFO | [i2c_controller] --- CGA Iter 1 / 15 ---
|
||
|
|
2026-04-22 16:38:53 | INFO | [i2c_controller] Target: FSM_state
|
||
|
|
2026-04-22 16:38:53 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 16:39:53 | WARNING | [i2c_controller] [CGA-1] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:40:30 | INFO | [i2c_controller] [CGA-1] Retry code generated successfully
|
||
|
|
2026-04-22 16:40:30 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 16:40:30 | ERROR | [i2c_controller] [CGA-1] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:40:30 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:40:30 | INFO | [i2c_controller] [CGA-1] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 16:40:58 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 16:40:58 | INFO | [i2c_controller] Quality Evaluation: diversity=1.00
|
||
|
|
2026-04-22 16:40:58 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:40:58 | INFO | [i2c_controller] --- CGA Iter 2 / 15 ---
|
||
|
|
2026-04-22 16:40:58 | INFO | [i2c_controller] Target: Counter_bit_count
|
||
|
|
2026-04-22 16:40:58 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 16:41:54 | WARNING | [i2c_controller] [CGA-2] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:42:46 | INFO | [i2c_controller] [CGA-2] Retry code generated successfully
|
||
|
|
2026-04-22 16:42:46 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 16:42:46 | ERROR | [i2c_controller] [CGA-2] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:42:46 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:42:46 | INFO | [i2c_controller] [CGA-2] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 16:43:39 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 16:43:39 | INFO | [i2c_controller] Quality Evaluation: diversity=0.21
|
||
|
|
2026-04-22 16:43:39 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:43:39 | INFO | [i2c_controller] --- CGA Iter 3 / 15 ---
|
||
|
|
2026-04-22 16:43:39 | INFO | [i2c_controller] Target: Exception_DefaultCase
|
||
|
|
2026-04-22 16:43:39 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 16:45:43 | WARNING | [i2c_controller] [CGA-3] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:47:29 | INFO | [i2c_controller] [CGA-3] Retry code generated successfully
|
||
|
|
2026-04-22 16:47:29 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 16:47:29 | ERROR | [i2c_controller] [CGA-3] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:47:29 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:47:29 | INFO | [i2c_controller] [CGA-3] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 16:48:41 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 16:48:41 | INFO | [i2c_controller] Quality Evaluation: diversity=0.22
|
||
|
|
2026-04-22 16:48:41 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:48:41 | INFO | [i2c_controller] --- CGA Iter 4 / 15 ---
|
||
|
|
2026-04-22 16:48:41 | INFO | [i2c_controller] Target: FSM_state
|
||
|
|
2026-04-22 16:48:41 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 16:49:31 | WARNING | [i2c_controller] [CGA-4] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:50:04 | INFO | [i2c_controller] [CGA-4] Retry code generated successfully
|
||
|
|
2026-04-22 16:50:04 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 16:50:04 | ERROR | [i2c_controller] [CGA-4] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:50:04 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:50:04 | INFO | [i2c_controller] [CGA-4] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 16:50:46 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 16:50:46 | INFO | [i2c_controller] Quality Evaluation: diversity=0.22
|
||
|
|
2026-04-22 16:50:46 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:50:46 | INFO | [i2c_controller] --- CGA Iter 5 / 15 ---
|
||
|
|
2026-04-22 16:50:46 | INFO | [i2c_controller] Target: Condition_5
|
||
|
|
2026-04-22 16:50:46 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 16:51:43 | WARNING | [i2c_controller] [CGA-5] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:52:09 | INFO | [i2c_controller] [CGA-5] Retry code generated successfully
|
||
|
|
2026-04-22 16:52:09 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 16:52:09 | ERROR | [i2c_controller] [CGA-5] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:52:09 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:52:09 | INFO | [i2c_controller] [CGA-5] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 16:52:49 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 16:52:49 | INFO | [i2c_controller] Quality Evaluation: diversity=0.25
|
||
|
|
2026-04-22 16:52:49 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:52:49 | INFO | [i2c_controller] --- CGA Iter 6 / 15 ---
|
||
|
|
2026-04-22 16:52:49 | INFO | [i2c_controller] Target: Condition_9
|
||
|
|
2026-04-22 16:52:49 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 16:53:59 | WARNING | [i2c_controller] [CGA-6] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:54:27 | INFO | [i2c_controller] [CGA-6] Retry code generated successfully
|
||
|
|
2026-04-22 16:54:27 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 16:54:27 | ERROR | [i2c_controller] [CGA-6] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:54:27 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:54:27 | INFO | [i2c_controller] [CGA-6] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 16:54:58 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 16:54:58 | INFO | [i2c_controller] Quality Evaluation: diversity=0.21
|
||
|
|
2026-04-22 16:54:58 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:54:58 | INFO | [i2c_controller] --- CGA Iter 7 / 15 ---
|
||
|
|
2026-04-22 16:54:58 | INFO | [i2c_controller] Target: Condition_10
|
||
|
|
2026-04-22 16:54:58 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 16:56:03 | WARNING | [i2c_controller] [CGA-7] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:56:31 | INFO | [i2c_controller] [CGA-7] Retry code generated successfully
|
||
|
|
2026-04-22 16:56:31 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 16:56:31 | ERROR | [i2c_controller] [CGA-7] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:56:31 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:56:31 | INFO | [i2c_controller] [CGA-7] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 16:56:56 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 16:56:57 | INFO | [i2c_controller] Quality Evaluation: diversity=0.21
|
||
|
|
2026-04-22 16:56:57 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:56:57 | INFO | [i2c_controller] --- CGA Iter 8 / 15 ---
|
||
|
|
2026-04-22 16:56:57 | INFO | [i2c_controller] Target: Condition_3
|
||
|
|
2026-04-22 16:56:57 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 16:57:58 | WARNING | [i2c_controller] [CGA-8] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:58:44 | INFO | [i2c_controller] [CGA-8] Retry code generated successfully
|
||
|
|
2026-04-22 16:58:44 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 16:58:44 | ERROR | [i2c_controller] [CGA-8] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:58:44 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 16:58:44 | INFO | [i2c_controller] [CGA-8] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 17:00:10 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 17:00:11 | INFO | [i2c_controller] Quality Evaluation: diversity=0.24
|
||
|
|
2026-04-22 17:00:11 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:00:11 | INFO | [i2c_controller] --- CGA Iter 9 / 15 ---
|
||
|
|
2026-04-22 17:00:11 | INFO | [i2c_controller] Target: Condition_4
|
||
|
|
2026-04-22 17:00:11 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 17:01:16 | WARNING | [i2c_controller] [CGA-9] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:01:47 | INFO | [i2c_controller] [CGA-9] Retry code generated successfully
|
||
|
|
2026-04-22 17:01:47 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 17:01:47 | ERROR | [i2c_controller] [CGA-9] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:01:47 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:01:47 | INFO | [i2c_controller] [CGA-9] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 17:02:23 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 17:02:23 | INFO | [i2c_controller] Quality Evaluation: diversity=0.22
|
||
|
|
2026-04-22 17:02:23 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:02:23 | INFO | [i2c_controller] --- CGA Iter 10 / 15 ---
|
||
|
|
2026-04-22 17:02:23 | INFO | [i2c_controller] Target: Condition_8
|
||
|
|
2026-04-22 17:02:23 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 17:03:39 | WARNING | [i2c_controller] [CGA-10] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:04:14 | INFO | [i2c_controller] [CGA-10] Retry code generated successfully
|
||
|
|
2026-04-22 17:04:14 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 17:04:14 | ERROR | [i2c_controller] [CGA-10] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:04:14 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:04:14 | INFO | [i2c_controller] [CGA-10] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 17:05:07 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 17:05:08 | INFO | [i2c_controller] Quality Evaluation: diversity=0.24
|
||
|
|
2026-04-22 17:05:08 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:05:08 | INFO | [i2c_controller] --- CGA Iter 11 / 15 ---
|
||
|
|
2026-04-22 17:05:08 | INFO | [i2c_controller] Target: Condition_11
|
||
|
|
2026-04-22 17:05:08 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 17:06:22 | WARNING | [i2c_controller] [CGA-11] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:07:23 | INFO | [i2c_controller] [CGA-11] Retry code generated successfully
|
||
|
|
2026-04-22 17:07:23 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 17:07:23 | ERROR | [i2c_controller] [CGA-11] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:07:23 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:07:23 | INFO | [i2c_controller] [CGA-11] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 17:08:27 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 17:08:27 | INFO | [i2c_controller] Quality Evaluation: diversity=0.21
|
||
|
|
2026-04-22 17:08:27 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:08:27 | INFO | [i2c_controller] --- CGA Iter 12 / 15 ---
|
||
|
|
2026-04-22 17:08:27 | INFO | [i2c_controller] Target: Condition_1
|
||
|
|
2026-04-22 17:08:27 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 17:09:58 | WARNING | [i2c_controller] [CGA-12] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:10:49 | INFO | [i2c_controller] [CGA-12] Retry code generated successfully
|
||
|
|
2026-04-22 17:10:49 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 17:10:49 | ERROR | [i2c_controller] [CGA-12] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:10:49 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:10:49 | INFO | [i2c_controller] [CGA-12] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 17:11:33 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 17:11:34 | INFO | [i2c_controller] Quality Evaluation: diversity=0.25
|
||
|
|
2026-04-22 17:11:34 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:11:34 | INFO | [i2c_controller] --- CGA Iter 13 / 15 ---
|
||
|
|
2026-04-22 17:11:34 | INFO | [i2c_controller] Target: Condition_2
|
||
|
|
2026-04-22 17:11:34 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 17:12:40 | WARNING | [i2c_controller] [CGA-13] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:13:30 | INFO | [i2c_controller] [CGA-13] Retry code generated successfully
|
||
|
|
2026-04-22 17:13:30 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 17:13:30 | ERROR | [i2c_controller] [CGA-13] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:13:30 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:13:30 | INFO | [i2c_controller] [CGA-13] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 17:14:41 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 17:14:42 | INFO | [i2c_controller] Quality Evaluation: diversity=0.24
|
||
|
|
2026-04-22 17:14:42 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:14:42 | INFO | [i2c_controller] --- CGA Iter 14 / 15 ---
|
||
|
|
2026-04-22 17:14:42 | INFO | [i2c_controller] Target: Condition_6
|
||
|
|
2026-04-22 17:14:42 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 17:15:23 | WARNING | [i2c_controller] [CGA-14] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:15:49 | INFO | [i2c_controller] [CGA-14] Retry code generated successfully
|
||
|
|
2026-04-22 17:15:50 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 17:15:50 | ERROR | [i2c_controller] [CGA-14] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:15:50 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:15:50 | INFO | [i2c_controller] [CGA-14] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 17:16:23 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 17:16:23 | INFO | [i2c_controller] Quality Evaluation: diversity=0.20
|
||
|
|
2026-04-22 17:16:23 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:16:23 | INFO | [i2c_controller] --- CGA Iter 15 / 15 ---
|
||
|
|
2026-04-22 17:16:23 | INFO | [i2c_controller] Target: Condition_7
|
||
|
|
2026-04-22 17:16:23 | INFO | [i2c_controller] Asking LLM to fix missing logic (Current: 31.72%)...
|
||
|
|
2026-04-22 17:17:03 | WARNING | [i2c_controller] [CGA-15] Syntax issues detected in generated code. Attempting retry... | location: autoline/TB_cga.py, func: run, line: 1503 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:17:24 | INFO | [i2c_controller] [CGA-15] Retry code generated successfully
|
||
|
|
2026-04-22 17:17:24 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1523
|
||
|
|
2026-04-22 17:17:24 | ERROR | [i2c_controller] [CGA-15] Verilator compilation failed: | location: autoline/TB_cga.py, func: run, line: 1529 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:17:24 | ERROR | [i2c_controller] obj_dir not created - compilation failed early | location: autoline/TB_cga.py, func: run, line: 1530 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:17:24 | INFO | [i2c_controller] [CGA-15] Asking LLM to fix compilation errors...
|
||
|
|
2026-04-22 17:17:55 | ERROR | [i2c_controller] Verilator Compile Failed. | location: utils/verilator_call.py, func: verilator_run_coverage, line: 242 | caller: location: autoline/TB_cga.py, func: run, line: 1552
|
||
|
|
2026-04-22 17:17:56 | INFO | [i2c_controller] Quality Evaluation: diversity=0.25
|
||
|
|
2026-04-22 17:17:56 | WARNING | [i2c_controller] Regression or Failure. Discarding changes. | location: autoline/TB_cga.py, func: run, line: 1644 | caller: location: autoline/TB_autoline.py, func: run_TBCGA, line: 302
|
||
|
|
2026-04-22 17:17:56 | INFO | [i2c_controller] CGA Finished. Final Coverage: 31.72%
|
||
|
|
2026-04-22 17:17:56 | INFO | [i2c_controller] Unreachable analysis: 0 truly unreachable, 99 potentially coverable
|
||
|
|
2026-04-22 17:17:56 | INFO | [i2c_controller] No unreachable branches found in DUT.
|
||
|
|
2026-04-22 17:17:56 | INFO | [i2c_controller] Energy report saved to saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260422_145630/i2c_controller/CGA/energy_report.txt
|
||
|
|
2026-04-22 17:17:56 | INFO | [i2c_controller] Diversity report saved to saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260422_145630/i2c_controller/CGA/diversity_report.txt
|
||
|
|
2026-04-22 17:17:56 | INFO | [i2c_controller] Quality evaluation report saved to saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260422_145630/i2c_controller/CGA/quality_evaluation_report.txt
|
||
|
|
2026-04-22 17:17:56 | INFO | [i2c_controller] Semantic Coverage: 56.36%
|
||
|
|
2026-04-22 17:17:56 | INFO | [i2c_controller] Saved optimized TB to: saves/0420~0426/MyExperimentsClean/MyProjectCleanI2C_20260422_145630/i2c_controller/final_TB.v
|
||
|
|
2026-04-22 17:17:56 | INFO | [i2c_controller] [TBeval] Eval 1: Golden RTL checking begins
|
||
|
|
2026-04-22 17:17:56 | FAILED | [i2c_controller] [TBeval] Eval 1: Golden RTL checking failed!
|
||
|
|
2026-04-22 17:17:56 | INFO | [i2c_controller] [TBeval] [i2c_controller] Eval 2/2b is skipped because Eval 1 failed
|
||
|
|
2026-04-22 17:17:56 | INFO | [i2c_controller]
|
||
|
|
2026-04-22 17:17:56 | INFO |
|
||
|
|
########## Analyze of Chatbench_RunInfo ##########
|
||
|
|
|
||
|
|
#### pass numbers:
|
||
|
|
Eval2 : 0
|
||
|
|
Eval1 : 0
|
||
|
|
Eval0 : 1
|
||
|
|
total : 1 (Failed: 0)
|
||
|
|
passed TB by autoline reboot action (from TB3_check): 0
|
||
|
|
|
||
|
|
passed TB by functional corrector: 0
|
||
|
|
|
||
|
|
#### CGA Coverage Info:
|
||
|
|
Average Coverage : 31.72%
|
||
|
|
Max Coverage : 31.72%
|
||
|
|
Min Coverage : 31.72%
|
||
|
|
|
||
|
|
#### tokens and cost:
|
||
|
|
average prompt tokens: 114321
|
||
|
|
average completion tokens: 55507
|
||
|
|
total cost: 5.6168
|
||
|
|
average cost: 5.6168
|
||
|
|
|
||
|
|
#### time:
|
||
|
|
average time: 8486.25s
|
||
|
|
|
||
|
|
#### debug info table:
|
||
|
|
FUNCTIONAL debug info table:
|
||
|
|
(debugged here means functional debugging)
|
||
|
|
| un-func-debugged | func-debugged | total |
|
||
|
|
failed | 0 | 0 | 0 |
|
||
|
|
Eval0 | 0 | 1 | 1 |
|
||
|
|
Eval1 | 0 | 0 | 0 |
|
||
|
|
Eval2 | 0 | 0 | 0 |
|
||
|
|
|
||
|
|
#### Eval2 ratio:
|
||
|
|
|
||
|
|
#### CGA Coverage Detail List:
|
||
|
|
Task ID | Coverage
|
||
|
|
----------------------------------------
|
||
|
|
i2c_controller | 31.72%
|
||
|
|
|
||
|
|
loose Eval2 pass metric applied: 0.8
|
||
|
|
|
||
|
|
|